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Searched refs:misaligned (Results 1 – 25 of 33) sorted by relevance

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/linux-5.19.10/block/
Dblk-settings.c57 lim->misaligned = 0; in blk_set_default_limits()
381 q->limits.misaligned = 0; in blk_queue_alignment_offset()
575 t->misaligned |= b->misaligned; in blk_stack_limits()
590 t->misaligned = 1; in blk_stack_limits()
611 t->misaligned = 1; in blk_stack_limits()
618 t->misaligned = 1; in blk_stack_limits()
625 t->misaligned = 1; in blk_stack_limits()
632 t->misaligned = 1; in blk_stack_limits()
646 t->misaligned = 1; in blk_stack_limits()
957 if (q->limits.misaligned) in bdev_alignment_offset()
/linux-5.19.10/drivers/dma/
Dpxa_dma.c90 bool misaligned; member
112 bool misaligned; member
450 static void phy_enable(struct pxad_phy *phy, bool misaligned) in phy_enable() argument
460 phy, phy->idx, misaligned); in phy_enable()
469 if (misaligned) in phy_enable()
512 phy_enable(chan->phy, chan->misaligned); in pxad_launch_chan()
571 to_pxad_sw_desc(vd)->misaligned) in pxad_try_hotchain()
652 chan->misaligned = in pxad_chan_handler()
808 if (chan->misaligned || !to_pxad_sw_desc(vd)->misaligned) in pxad_tx_submit()
817 chan->misaligned |= to_pxad_sw_desc(vd)->misaligned; in pxad_tx_submit()
[all …]
/linux-5.19.10/drivers/net/ethernet/neterion/vxge/
Dvxge-config.h1903 unsigned long misaligned = 0; in vxge_os_dma_malloc() local
1911 misaligned = (unsigned long)VXGE_ALIGN((unsigned long)vaddr, in vxge_os_dma_malloc()
1916 if (misaligned) { in vxge_os_dma_malloc()
1926 *(unsigned long *)p_dma_acch = misaligned; in vxge_os_dma_malloc()
1927 vaddr = (void *)((u8 *)vaddr + misaligned); in vxge_os_dma_malloc()
1934 unsigned long misaligned = *(unsigned long *)p_dma_acch; in vxge_os_dma_free() local
1936 tmp -= misaligned; in vxge_os_dma_free()
/linux-5.19.10/arch/nios2/kernel/
DMakefile26 obj-$(CONFIG_NIOS2_ALIGNMENT_TRAP) += misaligned.o
/linux-5.19.10/arch/alpha/lib/
Dev67-strlen.S29 ldq_u $1, 0($16) # L : load first quadword ($16 may be misaligned)
Dev67-strcat.S35 ldq_u $1, 0($16) # L : load first quadword (a0 may be misaligned)
Dstrcat.S23 ldq_u $1, 0($16) # load first quadword (a0 may be misaligned)
Dstrlen.S25 ldq_u $1, 0($16) # load first quadword ($16 may be misaligned)
Dstrncat.S28 ldq_u $1, 0($16) # load first quadword ($16 may be misaligned)
Dev6-clear_user.S57 and $1, 7, $2 # .. .. E .. : number of misaligned bytes in tail
69 mskql $5, $16, $5 # .. U .. .. : take care of misaligned head
Dev67-strncat.S37 ldq_u $1, 0($16) # L : load first quadword ($16 may be misaligned)
Dev6-memcpy.S39 bne $1, $misaligned # U : Nope - gotta do this the slow way
181 $misaligned:
Dclear_user.S81 mskql $5, $16, $5 # e0 : take care of misaligned head
/linux-5.19.10/Documentation/arm/
Dmem_alignment.rst5 Too many problems popped up because of unnoticed misaligned memory access in
16 alignment trap can fixup misaligned access for the exception cases, but at
/linux-5.19.10/arch/m68k/ifpsp060/
DCHANGES86 bit 27 = 1 (misaligned bit)
108 bit 27 = 0 (misaligned bit)
Disp.doc46 cas (w/ a misaligned effective address)
174 The instructions "cas2" and "cas" (when used with a misaligned effective
/linux-5.19.10/scripts/coccinelle/misc/
Dcond_no_effect.cocci26 // /* misaligned */
/linux-5.19.10/lib/
DKconfig.ubsan123 bool "Perform checking for misaligned pointer usage"
/linux-5.19.10/arch/sh/lib/
Dchecksum.S162 ! Check if the buffer was misaligned, if so realign sum
/linux-5.19.10/Documentation/core-api/
Dprintk-index.rst50 <5> block/blk-settings.c:661 disk_stack_limits "%s: Warning: Device %s is misaligned\n"
/linux-5.19.10/arch/arm/kernel/
Dhead.S581 THUMB( mov r6, r6, lsr #16 ) @ to be robust against misaligned r0.
/linux-5.19.10/Documentation/sphinx/
Dkerneldoc-preamble.sty183 % For CJK ascii-art alignment (still misaligned for Hangul)
/linux-5.19.10/tools/perf/Documentation/
Dperf-arm-spe.txt154 bit 11 - misaligned access
/linux-5.19.10/include/linux/
Dblkdev.h278 unsigned char misaligned; member
/linux-5.19.10/arch/arc/
DKconfig505 This enables misaligned 16 & 32 bit memory access from user space.

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