/linux-5.19.10/drivers/gpu/drm/mcde/ |
D | mcde_display.c | 73 void mcde_display_irq(struct mcde *mcde) in mcde_display_irq() argument 79 mispp = readl(mcde->regs + MCDE_MISPP); in mcde_display_irq() 80 misovl = readl(mcde->regs + MCDE_MISOVL); in mcde_display_irq() 81 mischnl = readl(mcde->regs + MCDE_MISCHNL); in mcde_display_irq() 91 if (!mcde->dpi_output && mcde_dsi_irq(mcde->mdsi)) { in mcde_display_irq() 100 if (mcde->flow_mode == MCDE_COMMAND_ONESHOT_FLOW) { in mcde_display_irq() 101 spin_lock(&mcde->flow_lock); in mcde_display_irq() 102 if (--mcde->flow_active == 0) { in mcde_display_irq() 103 dev_dbg(mcde->dev, "TE0 IRQ\n"); in mcde_display_irq() 105 val = readl(mcde->regs + MCDE_CRA0); in mcde_display_irq() [all …]
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D | mcde_drv.c | 113 struct mcde *mcde = data; in mcde_irq() local 116 val = readl(mcde->regs + MCDE_MISERR); in mcde_irq() 118 mcde_display_irq(mcde); in mcde_irq() 121 dev_info(mcde->dev, "some error IRQ\n"); in mcde_irq() 122 writel(val, mcde->regs + MCDE_RISERR); in mcde_irq() 130 struct mcde *mcde = to_mcde(drm); in mcde_modeset_init() local 141 if (!mcde->bridge) { in mcde_modeset_init() 161 mcde->dpi_output = true; in mcde_modeset_init() 162 mcde->bridge = bridge; in mcde_modeset_init() 163 mcde->flow_mode = MCDE_DPI_FORMATTER_FLOW; in mcde_modeset_init() [all …]
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D | mcde_clk_div.c | 11 struct mcde *mcde; member 19 struct mcde *mcde = cdiv->mcde; in mcde_clk_div_enable() local 22 spin_lock(&mcde->fifo_crx1_lock); in mcde_clk_div_enable() 23 val = readl(mcde->regs + cdiv->cr); in mcde_clk_div_enable() 37 writel(val, mcde->regs + cdiv->cr); in mcde_clk_div_enable() 38 spin_unlock(&mcde->fifo_crx1_lock); in mcde_clk_div_enable() 85 struct mcde *mcde = cdiv->mcde; in mcde_clk_div_recalc_rate() local 94 if (!regulator_is_enabled(mcde->epod)) in mcde_clk_div_recalc_rate() 97 cr = readl(mcde->regs + cdiv->cr); in mcde_clk_div_recalc_rate() 138 int mcde_init_clock_divider(struct mcde *mcde) in mcde_init_clock_divider() argument [all …]
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D | mcde_drm.h | 69 struct mcde { struct 98 #define to_mcde(dev) container_of(dev, struct mcde, drm) argument 100 static inline bool mcde_flow_is_video(struct mcde *mcde) in mcde_flow_is_video() argument 102 return (mcde->flow_mode == MCDE_VIDEO_TE_FLOW || in mcde_flow_is_video() 103 mcde->flow_mode == MCDE_VIDEO_FORMATTER_FLOW); in mcde_flow_is_video() 112 void mcde_display_irq(struct mcde *mcde); 113 void mcde_display_disable_irqs(struct mcde *mcde); 116 int mcde_init_clock_divider(struct mcde *mcde);
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D | mcde_dsi.c | 40 struct mcde *mcde; member 150 d->mcde->mdsi = d->mdsi; in mcde_dsi_attach_to_mcde() 165 d->mcde->flow_mode = MCDE_VIDEO_FORMATTER_FLOW; in mcde_dsi_attach_to_mcde() 167 d->mcde->flow_mode = MCDE_COMMAND_TE_FLOW; in mcde_dsi_attach_to_mcde() 187 if (d->mcde) in mcde_dsi_host_attach() 199 if (d->mcde) in mcde_dsi_host_detach() 200 d->mcde->mdsi = NULL; in mcde_dsi_host_detach() 1074 struct mcde *mcde = to_mcde(drm); in mcde_dsi_bind() local 1085 d->mcde = mcde; in mcde_dsi_bind() 1145 mcde->bridge = &d->bridge; in mcde_dsi_bind()
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/linux-5.19.10/Documentation/devicetree/bindings/display/ |
D | ste,mcde.yaml | 4 $id: http://devicetree.org/schemas/display/ste,mcde.yaml# 14 const: ste,mcde 31 - const: mcde 65 const: ste,mcde-dsi 115 mcde@a0350000 { 116 compatible = "ste,mcde"; 124 clock-names = "mcde", "lcd", "hdmi"; 130 compatible = "ste,mcde-dsi"; 147 compatible = "ste,mcde-dsi"; 157 compatible = "ste,mcde-dsi";
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/linux-5.19.10/Documentation/gpu/ |
D | mcde.rst | 4 drm/mcde ST-Ericsson MCDE Multi-channel display engine 7 .. kernel-doc:: drivers/gpu/drm/mcde/mcde_drv.c
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D | drivers.rst | 9 mcde
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/linux-5.19.10/Documentation/sparc/ |
D | adi.rst | 16 1. Set the user mode PSTATE.mcde bit. This acts as master switch for 41 kernel sets the PSTATE.mcde bit fot the task. Version tags for memory 101 the task is running with ADI enabled (PSTATE.mcde=1), and the ADI 121 the task is running with ADI enabled (PSTATE.mcde=1), and the ADI 186 unsigned long i, mcde, adi_blksz, adi_nbits;
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/linux-5.19.10/Documentation/devicetree/bindings/display/panel/ |
D | sony,acx424akp.yaml | 43 compatible = "ste,mcde-dsi";
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/linux-5.19.10/arch/arm/boot/dts/ |
D | ste-dbx5x0.dtsi | 1112 mcde@a0350000 { 1113 compatible = "ste,mcde"; 1120 clock-names = "mcde", "lcd", "hdmi"; 1127 compatible = "ste,mcde-dsi"; 1135 compatible = "ste,mcde-dsi"; 1143 compatible = "ste,mcde-dsi";
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D | ste-href-stuib.dtsi | 199 mcde@a0350000 {
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D | ste-href-family-pinctrl.dtsi | 72 mcde {
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D | ste-href-tvk1281618-r3.dtsi | 155 mcde@a0350000 {
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D | ste-ab8505.dtsi | 310 mcde@a0350000 {
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D | ste-href.dtsi | 300 mcde@a0350000 {
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D | ste-ux500-samsung-golden.dts | 353 mcde@a0350000 { 604 mcde {
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D | ste-href-tvk1281618-r2.dtsi | 213 mcde@a0350000 {
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D | ste-ux500-samsung-kyle.dts | 456 mcde@a0350000 { 504 mcde {
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D | ste-ux500-samsung-skomer.dts | 462 mcde@a0350000 { 507 mcde {
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D | ste-hrefv60plus.dtsi | 348 mcde {
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D | ste-ab8500.dtsi | 373 mcde@a0350000 {
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D | ste-ux500-samsung-codina-tmo.dts | 542 mcde@a0350000 { 758 mcde {
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D | ste-ux500-samsung-gavini.dts | 585 mcde@a0350000 { 612 mcde {
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/linux-5.19.10/drivers/gpu/drm/ |
D | Makefile | 141 obj-$(CONFIG_DRM_MCDE) += mcde/
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