Searched refs:mailboxes (Results 1 – 19 of 19) sorted by relevance
/linux-5.19.10/Documentation/devicetree/bindings/mailbox/ |
D | nvidia,tegra186-hsp.yaml | 21 The features that HSP supported are shared mailboxes, shared 29 For shared mailboxes, the first cell composed of two fields: 36 TEGRA_HSP_MBOX_TYPE_SM for shared mailboxes. 41 For shared mailboxes, the second cell is composed of two fields: 53 mailboxes may vary by instance of the HSP block and SoC
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D | apple,mailbox.yaml | 26 ASC mailboxes are the most common variant found on the M1 used 36 M3 mailboxes are an older variant with a slightly different MMIO
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D | mailbox.txt | 27 users of these mailboxes for IPC, one for each mailbox. This shared
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D | ti,omap-mailbox.yaml | 49 within a SoC. The sub-mailboxes (actual communication channels) are 78 on mailboxes that have multiple interrupt lines connected to the MPU 109 the Tx ticker. Should be used only on sub-mailboxes used to
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D | arm,mhuv2.yaml | 22 must be specified as two separate mailboxes.
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/linux-5.19.10/drivers/mailbox/ |
D | tegra-hsp.c | 121 struct tegra_hsp_mailbox *mailboxes; member 234 struct tegra_hsp_mailbox *mb = &hsp->mailboxes[bit]; in tegra_hsp_shared_irq() 260 struct tegra_hsp_mailbox *mb = &hsp->mailboxes[bit]; in tegra_hsp_shared_irq() 632 mb = &hsp->mailboxes[index]; in tegra_hsp_sm_xlate() 672 hsp->mailboxes = devm_kcalloc(dev, hsp->num_sm, sizeof(*hsp->mailboxes), in tegra_hsp_add_mailboxes() 674 if (!hsp->mailboxes) in tegra_hsp_add_mailboxes() 678 struct tegra_hsp_mailbox *mb = &hsp->mailboxes[i]; in tegra_hsp_add_mailboxes() 893 if (hsp->mailboxes) { in tegra_hsp_resume() 895 struct tegra_hsp_mailbox *mb = &hsp->mailboxes[i]; in tegra_hsp_resume()
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D | Kconfig | 7 signals. Say Y if your platform supports hardware mailboxes. 36 which provides unidirectional mailboxes between processing elements.
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/linux-5.19.10/Documentation/driver-api/rapidio/ |
D | rio_cm.rst | 23 messaging mailboxes in case of multi-packet message (up to 4KB) and 24 up to 64 mailboxes if single-packet messages (up to 256 B) are used. In addition 26 have reduced number of messaging mailboxes. RapidIO aware applications must 95 mailboxes.
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D | rapidio.rst | 39 resources such as mailboxes and doorbells. The rio_mport also includes a unique
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/linux-5.19.10/Documentation/devicetree/bindings/serial/ |
D | nvidia,tegra194-tcu.yaml | 16 based protocol where each "virtual UART" has a pair of mailboxes, one
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/linux-5.19.10/Documentation/admin-guide/ |
D | rapidio.rst | 40 resources, and manage mailboxes/doorbells.
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/linux-5.19.10/Documentation/devicetree/bindings/firmware/ |
D | arm,scmi.yaml | 57 Specifies the mailboxes used to communicate with SCMI compliant 66 exactly one or two mailboxes, one for transmitting messages("tx")
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D | arm,scpi.yaml | 51 processors using these mailboxes for IPC, one for each mailbox SHM can
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/linux-5.19.10/Documentation/devicetree/bindings/arm/keystone/ |
D | ti,sci.yaml | 55 Specifies the mailboxes used to communicate with TI-SCI Controller
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/linux-5.19.10/arch/arm/boot/dts/ |
D | omap34xx-omap36xx-clocks.dtsi | 134 mailboxes_ick: clock-mailboxes-ick {
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/linux-5.19.10/drivers/firmware/arm_scmi/ |
D | Kconfig | 55 transport based on mailboxes, answer Y.
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/linux-5.19.10/Documentation/scsi/ |
D | ChangeLog.megaraid | 440 mailboxes) and only first 22 bytes (for 64-bit mailboxes). This is to
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/linux-5.19.10/Documentation/driver-api/media/drivers/ |
D | cx2341x-devel.rst | 214 mailboxes are basically a fixed length array that serves as the call-stack. 216 Firmware mailboxes can be located by searching the encoder and decoder memory 226 The firmware implements 20 mailboxes of 20 32-bit words. The first 10 are 272 mailboxes for pending commands, processes them, sets the result code, populates
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/linux-5.19.10/Documentation/networking/device_drivers/can/ctu/ |
D | ctucanfd-driver.rst | 194 device HW queue (FIFO, mailboxes or whatever the implementation is)
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