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Searched refs:lsfw (Results 1 – 12 of 12) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/nouveau/nvkm/subdev/acr/
Dlsfw.c29 nvkm_acr_lsfw_del(struct nvkm_acr_lsfw *lsfw) in nvkm_acr_lsfw_del() argument
31 nvkm_blob_dtor(&lsfw->img); in nvkm_acr_lsfw_del()
32 nvkm_firmware_put(lsfw->sig); in nvkm_acr_lsfw_del()
33 list_del(&lsfw->head); in nvkm_acr_lsfw_del()
34 kfree(lsfw); in nvkm_acr_lsfw_del()
40 struct nvkm_acr_lsfw *lsfw, *lsft; in nvkm_acr_lsfw_del_all() local
41 list_for_each_entry_safe(lsfw, lsft, &acr->lsfw, head) { in nvkm_acr_lsfw_del_all()
42 nvkm_acr_lsfw_del(lsfw); in nvkm_acr_lsfw_del_all()
49 struct nvkm_acr_lsfw *lsfw; in nvkm_acr_lsfw_get() local
50 list_for_each_entry(lsfw, &acr->lsfw, head) { in nvkm_acr_lsfw_get()
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Dgp102.c37 struct nvkm_acr_lsfw *lsfw; in gp102_acr_wpr_patch() local
44 list_for_each_entry(lsfw, &acr->lsfw, head) { in gp102_acr_wpr_patch()
45 if (lsfw->id != hdr.falcon_id) in gp102_acr_wpr_patch()
51 lsfw->func->bld_patch(acr, lsb.tail.bl_data_off, adjust); in gp102_acr_wpr_patch()
60 gp102_acr_wpr_build_lsb(struct nvkm_acr *acr, struct nvkm_acr_lsfw *lsfw) in gp102_acr_wpr_build_lsb() argument
64 if (WARN_ON(lsfw->sig->size != sizeof(hdr.signature))) in gp102_acr_wpr_build_lsb()
67 memcpy(&hdr.signature, lsfw->sig->data, lsfw->sig->size); in gp102_acr_wpr_build_lsb()
68 gm200_acr_wpr_build_lsb_tail(lsfw, &hdr.tail); in gp102_acr_wpr_build_lsb()
70 nvkm_wobj(acr->wpr, lsfw->offset.lsb, &hdr, sizeof(hdr)); in gp102_acr_wpr_build_lsb()
77 struct nvkm_acr_lsfw *lsfw; in gp102_acr_wpr_build() local
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Dgm200.c70 struct nvkm_acr_lsf *lsfw; in gm200_acr_wpr_patch() local
77 list_for_each_entry(lsfw, &acr->lsfw, head) { in gm200_acr_wpr_patch()
78 if (lsfw->id != hdr.falcon_id) in gm200_acr_wpr_patch()
84 lsfw->func->bld_patch(acr, lsb.tail.bl_data_off, adjust); in gm200_acr_wpr_patch()
92 gm200_acr_wpr_build_lsb_tail(struct nvkm_acr_lsfw *lsfw, in gm200_acr_wpr_build_lsb_tail() argument
95 hdr->ucode_off = lsfw->offset.img; in gm200_acr_wpr_build_lsb_tail()
96 hdr->ucode_size = lsfw->ucode_size; in gm200_acr_wpr_build_lsb_tail()
97 hdr->data_size = lsfw->data_size; in gm200_acr_wpr_build_lsb_tail()
98 hdr->bl_code_size = lsfw->bootloader_size; in gm200_acr_wpr_build_lsb_tail()
99 hdr->bl_imem_off = lsfw->bootloader_imem_offset; in gm200_acr_wpr_build_lsb_tail()
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Dtu102.c45 struct nvkm_acr_lsfw *lsfw; in tu102_acr_wpr_build() local
53 list_for_each_entry(lsfw, &acr->lsfw, head) { in tu102_acr_wpr_build()
54 struct lsf_signature_v1 *sig = (void *)lsfw->sig->data; in tu102_acr_wpr_build()
56 .falcon_id = lsfw->id, in tu102_acr_wpr_build()
57 .lsb_offset = lsfw->offset.lsb, in tu102_acr_wpr_build()
69 ret = gp102_acr_wpr_build_lsb(acr, lsfw); in tu102_acr_wpr_build()
74 nvkm_wobj(acr->wpr, lsfw->offset.img, in tu102_acr_wpr_build()
75 lsfw->img.data, in tu102_acr_wpr_build()
76 lsfw->img.size); in tu102_acr_wpr_build()
79 lsfw->func->bld_write(acr, lsfw->offset.bld, lsfw); in tu102_acr_wpr_build()
Dbase.c220 struct nvkm_acr_lsfw *lsfw, *lsft; in nvkm_acr_oneinit() local
235 list_for_each_entry_safe(lsfw, lsft, &acr->lsfw, head) { in nvkm_acr_oneinit()
238 if (!lsfw->func) { in nvkm_acr_oneinit()
239 nvkm_acr_lsfw_del(lsfw); in nvkm_acr_oneinit()
247 ret = nvkm_falcon_get(lsfw->falcon, subdev); in nvkm_acr_oneinit()
251 nvkm_falcon_put(lsfw->falcon, subdev); in nvkm_acr_oneinit()
255 lsf->func = lsfw->func; in nvkm_acr_oneinit()
256 lsf->falcon = lsfw->falcon; in nvkm_acr_oneinit()
257 lsf->id = lsfw->id; in nvkm_acr_oneinit()
274 list_for_each_entry_safe(lsfw, lsft, &acr->lsfw, head) { in nvkm_acr_oneinit()
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DKbuild4 nvkm-y += nvkm/subdev/acr/lsfw.o
/linux-5.19.10/drivers/gpu/drm/nouveau/nvkm/engine/sec2/
Dgp102.c101 struct nvkm_acr_lsfw *lsfw) in gp102_sec2_acr_bld_write() argument
105 .code_dma_base = lsfw->offset.img + lsfw->app_start_offset, in gp102_sec2_acr_bld_write()
106 .code_size_total = lsfw->app_size, in gp102_sec2_acr_bld_write()
107 .code_size_to_load = lsfw->app_resident_code_size, in gp102_sec2_acr_bld_write()
108 .code_entry_point = lsfw->app_imem_entry, in gp102_sec2_acr_bld_write()
109 .data_dma_base = lsfw->offset.img + lsfw->app_start_offset + in gp102_sec2_acr_bld_write()
110 lsfw->app_resident_data_offset, in gp102_sec2_acr_bld_write()
111 .data_size = lsfw->app_resident_data_size, in gp102_sec2_acr_bld_write()
112 .overlay_dma_base = lsfw->offset.img + lsfw->app_start_offset, in gp102_sec2_acr_bld_write()
114 .argv = lsfw->falcon->func->emem_addr, in gp102_sec2_acr_bld_write()
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/linux-5.19.10/drivers/gpu/drm/nouveau/nvkm/engine/gr/
Dgp108.c41 struct nvkm_acr_lsfw *lsfw) in gp108_gr_acr_bld_write() argument
43 const u64 base = lsfw->offset.img + lsfw->app_start_offset; in gp108_gr_acr_bld_write()
44 const u64 code = base + lsfw->app_resident_code_offset; in gp108_gr_acr_bld_write()
45 const u64 data = base + lsfw->app_resident_data_offset; in gp108_gr_acr_bld_write()
49 .non_sec_code_off = lsfw->app_resident_code_offset, in gp108_gr_acr_bld_write()
50 .non_sec_code_size = lsfw->app_resident_code_size, in gp108_gr_acr_bld_write()
51 .code_entry_point = lsfw->app_imem_entry, in gp108_gr_acr_bld_write()
53 .data_size = lsfw->app_resident_data_size, in gp108_gr_acr_bld_write()
Dgm20b.c53 struct nvkm_acr_lsfw *lsfw) in gm20b_gr_acr_bld_write() argument
55 const u64 base = lsfw->offset.img + lsfw->app_start_offset; in gm20b_gr_acr_bld_write()
56 const u64 code = (base + lsfw->app_resident_code_offset) >> 8; in gm20b_gr_acr_bld_write()
57 const u64 data = (base + lsfw->app_resident_data_offset) >> 8; in gm20b_gr_acr_bld_write()
61 .non_sec_code_off = lsfw->app_resident_code_offset, in gm20b_gr_acr_bld_write()
62 .non_sec_code_size = lsfw->app_resident_code_size, in gm20b_gr_acr_bld_write()
63 .code_entry_point = lsfw->app_imem_entry, in gm20b_gr_acr_bld_write()
65 .data_size = lsfw->app_resident_data_size, in gm20b_gr_acr_bld_write()
Dgm200.c59 struct nvkm_acr_lsfw *lsfw) in gm200_gr_acr_bld_write() argument
61 const u64 base = lsfw->offset.img + lsfw->app_start_offset; in gm200_gr_acr_bld_write()
62 const u64 code = base + lsfw->app_resident_code_offset; in gm200_gr_acr_bld_write()
63 const u64 data = base + lsfw->app_resident_data_offset; in gm200_gr_acr_bld_write()
67 .non_sec_code_off = lsfw->app_resident_code_offset, in gm200_gr_acr_bld_write()
68 .non_sec_code_size = lsfw->app_resident_code_size, in gm200_gr_acr_bld_write()
69 .code_entry_point = lsfw->app_imem_entry, in gm200_gr_acr_bld_write()
71 .data_size = lsfw->app_resident_data_size, in gm200_gr_acr_bld_write()
/linux-5.19.10/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/
Dgm20b.c98 struct nvkm_acr_lsfw *lsfw) in gm20b_pmu_acr_bld_write() argument
100 const u64 base = lsfw->offset.img + lsfw->app_start_offset; in gm20b_pmu_acr_bld_write()
101 const u64 code = (base + lsfw->app_resident_code_offset) >> 8; in gm20b_pmu_acr_bld_write()
102 const u64 data = (base + lsfw->app_resident_data_offset) >> 8; in gm20b_pmu_acr_bld_write()
106 .code_size_total = lsfw->app_size, in gm20b_pmu_acr_bld_write()
107 .code_size_to_load = lsfw->app_resident_code_size, in gm20b_pmu_acr_bld_write()
108 .code_entry_point = lsfw->app_imem_entry, in gm20b_pmu_acr_bld_write()
110 .data_size = lsfw->app_resident_data_size, in gm20b_pmu_acr_bld_write()
113 .argv = lsfw->falcon->data.limit - sizeof(struct nv_pmu_args), in gm20b_pmu_acr_bld_write()
/linux-5.19.10/drivers/gpu/drm/nouveau/include/nvkm/subdev/
Dacr.h40 struct list_head lsfw, lsf; member