Searched refs:lane_base (Results 1 – 5 of 5) sorted by relevance
/linux-5.19.10/drivers/gpu/drm/msm/dsi/phy/ |
D | dsi_phy_10nm.c | 744 void __iomem *lane_base = phy->lane_base; in dsi_phy_hw_v3_0_config_lpcdrx() local 752 dsi_phy_write(lane_base + in dsi_phy_hw_v3_0_config_lpcdrx() 755 dsi_phy_write(lane_base + in dsi_phy_hw_v3_0_config_lpcdrx() 763 void __iomem *lane_base = phy->lane_base; in dsi_phy_hw_v3_0_lane_settings() local 771 dsi_phy_write(lane_base + REG_DSI_10nm_PHY_LN_LPTX_STR_CTRL(i), in dsi_phy_hw_v3_0_lane_settings() 778 dsi_phy_write(lane_base + REG_DSI_10nm_PHY_LN_LPRX_CTRL(i), 0); in dsi_phy_hw_v3_0_lane_settings() 779 dsi_phy_write(lane_base + REG_DSI_10nm_PHY_LN_PIN_SWAP(i), 0x0); in dsi_phy_hw_v3_0_lane_settings() 780 dsi_phy_write(lane_base + REG_DSI_10nm_PHY_LN_HSTX_STR_CTRL(i), in dsi_phy_hw_v3_0_lane_settings() 788 dsi_phy_write(lane_base + REG_DSI_10nm_PHY_LN_CFG0(i), 0x0); in dsi_phy_hw_v3_0_lane_settings() 789 dsi_phy_write(lane_base + REG_DSI_10nm_PHY_LN_CFG1(i), 0x0); in dsi_phy_hw_v3_0_lane_settings() [all …]
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D | dsi_phy_7nm.c | 772 void __iomem *lane_base = phy->lane_base; in dsi_phy_hw_v4_0_config_lpcdrx() local 780 dsi_phy_write(lane_base + in dsi_phy_hw_v4_0_config_lpcdrx() 783 dsi_phy_write(lane_base + in dsi_phy_hw_v4_0_config_lpcdrx() 793 void __iomem *lane_base = phy->lane_base; in dsi_phy_hw_v4_0_lane_settings() local 805 dsi_phy_write(lane_base + REG_DSI_7nm_PHY_LN_LPRX_CTRL(i), 0); in dsi_phy_hw_v4_0_lane_settings() 806 dsi_phy_write(lane_base + REG_DSI_7nm_PHY_LN_PIN_SWAP(i), 0x0); in dsi_phy_hw_v4_0_lane_settings() 813 dsi_phy_write(lane_base + REG_DSI_7nm_PHY_LN_CFG0(i), 0x0); in dsi_phy_hw_v4_0_lane_settings() 814 dsi_phy_write(lane_base + REG_DSI_7nm_PHY_LN_CFG1(i), 0x0); in dsi_phy_hw_v4_0_lane_settings() 815 dsi_phy_write(lane_base + REG_DSI_7nm_PHY_LN_CFG2(i), i == 4 ? 0x8a : 0xa); in dsi_phy_hw_v4_0_lane_settings() 816 dsi_phy_write(lane_base + REG_DSI_7nm_PHY_LN_TX_DCTRL(i), tx_dctrl[i]); in dsi_phy_hw_v4_0_lane_settings()
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D | dsi_phy_14nm.c | 909 void __iomem *base = phy->lane_base; in dsi_14nm_dphy_set_timing() 950 void __iomem *lane_base = phy->lane_base; in dsi_14nm_phy_enable() local 968 dsi_phy_write(lane_base + REG_DSI_14nm_PHY_LN_VREG_CNTRL(i), in dsi_14nm_phy_enable() 971 dsi_phy_write(lane_base + in dsi_14nm_phy_enable() 973 dsi_phy_write(lane_base + in dsi_14nm_phy_enable() 977 dsi_phy_write(lane_base + REG_DSI_14nm_PHY_LN_CFG3(i), in dsi_14nm_phy_enable() 979 dsi_phy_write(lane_base + REG_DSI_14nm_PHY_LN_CFG2(i), 0x10); in dsi_14nm_phy_enable() 980 dsi_phy_write(lane_base + REG_DSI_14nm_PHY_LN_TEST_DATAPATH(i), in dsi_14nm_phy_enable() 982 dsi_phy_write(lane_base + REG_DSI_14nm_PHY_LN_TEST_STR(i), in dsi_14nm_phy_enable()
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D | dsi_phy.h | 93 void __iomem *lane_base; member
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D | dsi_phy.c | 727 phy->lane_base = msm_ioremap_size(pdev, "dsi_phy_lane", &phy->lane_size); in dsi_phy_driver_probe() 728 if (IS_ERR(phy->lane_base)) { in dsi_phy_driver_probe() 938 if (phy->lane_base) in msm_dsi_phy_snapshot() 940 phy->lane_size, phy->lane_base, in msm_dsi_phy_snapshot()
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