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/linux-5.19.10/Documentation/fb/
Dviafb.modes14 # Scan Frequency 31.469 kHz 59.94 Hz
29 # D: 25.175 MHz, H: 31.469 kHz, V: 59.94 Hz
32 # D: 24.823 MHz, H: 39.780 kHz, V: 60.00 Hz
39 # Scan Frequency 37.500 kHz 75.00 Hz
53 # D: 31.50 MHz, H: 37.500 kHz, V: 75.00 Hz
60 # Scan Frequency 43.269 kHz 85.00 Hz
74 # D: 36.000 MHz, H: 43.269 kHz, V: 85.00 Hz
81 # Scan Frequency 50.900 kHz 100.00 Hz
95 # D: 43.163 MHz, H: 50.900 kHz, V: 100.00 Hz
102 # Scan Frequency 61.800 kHz 120.00 Hz
[all …]
/linux-5.19.10/Documentation/devicetree/bindings/clock/
Dlpc1850-creg-clk.txt5 32 kHz oscillator driver with power up/down and clock gating. Next
6 is a fixed divider that creates a 1 kHz clock from the 32 kHz osc.
9 The 32 kHz can also be routed to other peripherials to enable low
21 Shall contain a phandle to the fixed 32 kHz crystal.
28 0 1 kHz clock
29 1 32 kHz Oscillator
Damlogic,gxbb-aoclkc.txt19 * "ext-32k-0" : external 32kHz reference #0 if any (optional)
20 * "ext-32k-1" : external 32kHz reference #1 if any (optional - gx only)
21 * "ext-32k-2" : external 32kHz reference #2 if any (optional - gx only)
/linux-5.19.10/Documentation/i2c/busses/
Di2c-ismt.rst21 Specify the bus speed in kHz.
27 80 kHz
28 100 kHz
29 400 kHz
30 1000 kHz
/linux-5.19.10/Documentation/arm/sunxi/
Dclocks.rst18 24MHz 32kHz
26 When you are about to suspend, you switch the CPU Mux to the 32kHz
29 24Mhz 32kHz
39 32kHz
/linux-5.19.10/arch/arm/boot/dts/
Dhighbank.dts29 /* kHz ignored */
48 /* kHz ignored */
67 /* kHz ignored */
86 /* kHz ignored */
Dimx6q.dtsi25 /* kHz uV */
33 /* ARM kHz SOC-PU uV */
62 /* kHz uV */
70 /* ARM kHz SOC-PU uV */
97 /* kHz uV */
105 /* ARM kHz SOC-PU uV */
132 /* kHz uV */
140 /* ARM kHz SOC-PU uV */
Dimx6dl-sabreauto.dts17 /* kHz uV */
23 /* ARM kHz SOC-PU uV */
Dimx6q-cm-fx6.dts176 /* kHz uV */
183 /* ARM kHz SOC-PU uV */
198 /* kHz uV */
205 /* ARM kHz SOC-PU uV */
220 /* kHz uV */
227 /* ARM kHz SOC-PU uV */
242 /* kHz uV */
249 /* ARM kHz SOC-PU uV */
Dimx6dl.dtsi24 /* kHz uV */
30 /* ARM kHz SOC-PU uV */
57 /* kHz uV */
63 /* ARM kHz SOC-PU uV */
/linux-5.19.10/Documentation/sound/cards/
Daudiophile-usb.rst48 * sample rate from 8kHz to 96kHz
57 * 16-bit/48kHz ==> 4 channels in + 4 channels out
61 * 24-bit/48kHz ==> 4 channels in + 2 channels out,
66 * 24-bit/96kHz ==> 2 channels in _or_ 2 channels out (half duplex only)
197 - 16bits 48kHz mode with Di disabled
204 - 16bits 48kHz mode with Di enabled
234 - 24bits 48kHz mode with Di disabled
241 - 24bits 48kHz mode with Di enabled
249 - 24bits 96kHz mode
266 - 16bits 48kHz mode with only the Do port enabled
[all …]
/linux-5.19.10/Documentation/userspace-api/media/dvb/
Dfe-set-tone.rst13 FE_SET_TONE - Sets/resets the generation of the continuous 22kHz tone.
34 This ioctl is used to set the generation of the continuous 22kHz tone.
38 to send a 22kHz tone in order to select between high/low band on some
/linux-5.19.10/drivers/media/usb/dvb-usb/
Dvp7045-fe.c161 .frequency_min_hz = 44250 * kHz,
162 .frequency_max_hz = 867250 * kHz,
163 .frequency_stepsize_hz = 1 * kHz,
Ddtt200u-fe.c230 .frequency_min_hz = 44250 * kHz,
231 .frequency_max_hz = 867250 * kHz,
232 .frequency_stepsize_hz = 250 * kHz,
/linux-5.19.10/Documentation/devicetree/bindings/pwm/
Dkontron,sl28cpld-pwm.yaml17 frequencies (250Hz, 500Hz, 1kHz, 2kHz).
/linux-5.19.10/drivers/media/dvb-frontends/
Ddvb_dummy_fe.c178 .frequency_max_hz = 863250 * kHz,
252 .frequency_stepsize_hz = 250 * kHz,
253 .frequency_tolerance_hz = 29500 * kHz,
/linux-5.19.10/Documentation/hwmon/
Dmcp3021.rst36 compatible interface. Standard (100 kHz) and Fast (400 kHz) I2C modes are
Dadt7411.rst43 fast_sampling Sample at 22.5 kHz instead of 1.4 kHz, but drop filters
Dlm85.rst153 driven by a 22.5 kHz clock. This is a global mode, not per-PWM output,
154 which means that setting any PWM frequency above 11.3 kHz will switch
155 all 3 PWM outputs to a 22.5 kHz frequency. Conversely, setting any PWM
156 frequency below 11.3 kHz will switch all 3 PWM outputs to a frequency
179 The LM96000 supports additional high frequency PWM modes (22.5 kHz, 24 kHz,
180 25.7 kHz, 27.7 kHz and 30 kHz), which can be configured on a per-PWM basis.
Dg760a.rst24 cycle counts of an assumed 32kHz clock source.
30 from the measured speed pulse period by assuming again a 32kHz clock
/linux-5.19.10/Documentation/devicetree/bindings/opp/
Dopp-v1.yaml28 - description: Frequency in kHz
45 /* kHz uV */
/linux-5.19.10/Documentation/devicetree/bindings/sound/
Dst,stm32-sai.yaml143 - description: x8k, SAI parent clock for sampling rates multiple of 8kHz.
144 - description: x11k, SAI parent clock for sampling rates multiple of 11.025kHz.
155 - description: x8k, SAI parent clock for sampling rates multiple of 8kHz.
156 - description: x11k, SAI parent clock for sampling rates multiple of 11.025kHz.
Dst,stm32-i2s.yaml31 - description: I2S parent clock for sampling rates multiple of 8kHz.
32 - description: I2S parent clock for sampling rates multiple of 11.025kHz.
/linux-5.19.10/Documentation/devicetree/bindings/rtc/
Dingenic,rtc.yaml54 (assuming RTC clock at 32 kHz)
62 (assuming RTC clock at 32 kHz)
/linux-5.19.10/Documentation/devicetree/bindings/mfd/
Dmxs-lradc.txt18 2 kHz and its default is 2 (= 1 ms)
20 1 ... 2047. It counts at 2 kHz and its default is

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