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Searched refs:ixDIDT_SQ_EDC_STALL_PATTERN_5_6 (Results 1 – 8 of 8) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dvega10_powertune.c413 …{ ixDIDT_SQ_EDC_STALL_PATTERN_5_6, 0xFFFFFFFF, 0, …
443 …{ ixDIDT_SQ_EDC_STALL_PATTERN_5_6, 0xFFFFFFFF, 0, …
616 …{ ixDIDT_SQ_EDC_STALL_PATTERN_5_6, DIDT_SQ_EDC_STALL_PATTERN_5_6__EDC_STALL_PATTERN_5_MASK, D…
617 …{ ixDIDT_SQ_EDC_STALL_PATTERN_5_6, DIDT_SQ_EDC_STALL_PATTERN_5_6__EDC_STALL_PATTERN_6_MASK, D…
Dsmu7_hwmgr.c121 #define ixDIDT_SQ_EDC_STALL_PATTERN_5_6 0x0017 macro
148 ixDIDT_SQ_EDC_STALL_PATTERN_5_6,
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h7160 #define ixDIDT_SQ_EDC_STALL_PATTERN_5_6 macro
Dgc_9_1_offset.h7368 #define ixDIDT_SQ_EDC_STALL_PATTERN_5_6 macro
Dgc_9_2_1_offset.h7410 #define ixDIDT_SQ_EDC_STALL_PATTERN_5_6 macro
Dgc_9_4_2_offset.h51 #define ixDIDT_SQ_EDC_STALL_PATTERN_5_6 macro
Dgc_10_1_0_offset.h11228 #define ixDIDT_SQ_EDC_STALL_PATTERN_5_6 macro
Dgc_10_3_0_offset.h13370 #define ixDIDT_SQ_EDC_STALL_PATTERN_5_6 macro