Searched refs:ixDIDT_DB_CTRL0 (Results 1 – 12 of 12) sorted by relevance
| /linux-5.19.10/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| D | vega10_powertune.c | 247 …{ ixDIDT_DB_CTRL0, DIDT_DB_CTRL0__DIDT_CTRL_EN_MASK, DIDT_DB_CTRL0__DIDT_CTRL…
248 …{ ixDIDT_DB_CTRL0, DIDT_DB_CTRL0__PHASE_OFFSET_MASK, DIDT_DB_CTRL0__PHASE_OFF…
249 …{ ixDIDT_DB_CTRL0, DIDT_DB_CTRL0__DIDT_CTRL_RST_MASK, DIDT_DB_CTRL0__DIDT_CTR…
250 …{ ixDIDT_DB_CTRL0, DIDT_DB_CTRL0__DIDT_CLK_EN_OVERRIDE_MASK, DIDT_DB_CTRL0__D…
251 …{ ixDIDT_DB_CTRL0, DIDT_DB_CTRL0__DIDT_STALL_CTRL_EN_MASK, DIDT_DB_CTRL0__DID…
252 …{ ixDIDT_DB_CTRL0, DIDT_DB_CTRL0__DIDT_TUNING_CTRL_EN_MASK, DIDT_DB_CTRL0__DI…
253 …{ ixDIDT_DB_CTRL0, DIDT_DB_CTRL0__DIDT_STALL_AUTO_RELEASE_EN_MASK, DIDT_DB_CT…
254 …{ ixDIDT_DB_CTRL0, DIDT_DB_CTRL0__DIDT_HI_POWER_THRESHOLD_MASK, DIDT_DB_CTRL0…
255 …{ ixDIDT_DB_CTRL0, DIDT_DB_CTRL0__DIDT_AUTO_MPD_EN_MASK, DIDT_DB_CTRL0__DIDT_…
256 …{ ixDIDT_DB_CTRL0, DIDT_DB_CTRL0__DIDT_STALL_EVENT_EN_MASK, DIDT_DB_CTRL0__DI…
[all …]
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| /linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gca/ |
| D | gfx_7_0_d.h | 2513 #define ixDIDT_DB_CTRL0 0x20 macro
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| D | gfx_7_2_d.h | 2538 #define ixDIDT_DB_CTRL0 0x20 macro
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| D | gfx_8_0_d.h | 2784 #define ixDIDT_DB_CTRL0 0x20 macro
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| D | gfx_8_1_d.h | 2762 #define ixDIDT_DB_CTRL0 0x20 macro
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| /linux-5.19.10/drivers/gpu/drm/amd/pm/legacy-dpm/ |
| D | kv_dpm.c | 475 data = RREG32_DIDT(ixDIDT_DB_CTRL0); in kv_do_enable_didt()
480 WREG32_DIDT(ixDIDT_DB_CTRL0, data); in kv_do_enable_didt()
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| /linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| D | gc_9_0_offset.h | 7169 #define ixDIDT_DB_CTRL0 … macro
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| D | gc_9_1_offset.h | 7376 #define ixDIDT_DB_CTRL0 … macro
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| D | gc_9_2_1_offset.h | 7414 #define ixDIDT_DB_CTRL0 … macro
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| D | gc_9_4_2_offset.h | 60 #define ixDIDT_DB_CTRL0 … macro
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| D | gc_10_1_0_offset.h | 11239 #define ixDIDT_DB_CTRL0 … macro
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| D | gc_10_3_0_offset.h | 13381 #define ixDIDT_DB_CTRL0 … macro
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