Searched refs:ixCG_CLKPIN_CNTL_2 (Results 1 – 12 of 12) sorted by relevance
| /linux-5.19.10/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| D | fiji_baco.c | 93 { CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixCG_CLKPIN_CNTL_2 },
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| D | ci_baco.c | 110 { CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixCG_CLKPIN_CNTL_2 },
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| D | polaris_baco.c | 105 { CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixCG_CLKPIN_CNTL_2 },
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| D | tonga_baco.c | 101 { CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixCG_CLKPIN_CNTL_2 },
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| /linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/smu/ |
| D | smu_7_0_0_d.h | 57 #define ixCG_CLKPIN_CNTL_2 0xc05001a4 macro
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| D | smu_7_1_1_d.h | 57 #define ixCG_CLKPIN_CNTL_2 0xc05001a4 macro
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| D | smu_7_0_1_d.h | 58 #define ixCG_CLKPIN_CNTL_2 0xc05001a4 macro
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| D | smu_7_1_2_d.h | 58 #define ixCG_CLKPIN_CNTL_2 0xc05001a4 macro
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| D | smu_7_1_3_d.h | 61 #define ixCG_CLKPIN_CNTL_2 0xc05001a4 macro
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| D | smu_7_1_0_d.h | 57 #define ixCG_CLKPIN_CNTL_2 0xc05001a4 macro
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| /linux-5.19.10/drivers/gpu/drm/amd/amdgpu/ |
| D | cik.c | 1843 orig = data = RREG32_SMC(ixCG_CLKPIN_CNTL_2); in cik_program_aspm()
1846 WREG32_SMC(ixCG_CLKPIN_CNTL_2, data); in cik_program_aspm()
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| D | vi.c | 552 tmp = RREG32_SMC(ixCG_CLKPIN_CNTL_2); in vi_get_xclk()
1240 orig = data = RREG32_SMC(ixCG_CLKPIN_CNTL_2); in vi_program_aspm()
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