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Searched refs:ixAZF0STREAM1_AZALIA_LATENCY_COUNTER_CONTROL (Results 1 – 11 of 11) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_offset.h7480 #define ixAZF0STREAM1_AZALIA_LATENCY_COUNTER_CONTROL … macro
Ddcn_3_0_1_offset.h12323 #define ixAZF0STREAM1_AZALIA_LATENCY_COUNTER_CONTROL … macro
Ddcn_1_0_offset.h13167 #define ixAZF0STREAM1_AZALIA_LATENCY_COUNTER_CONTROL … macro
Ddcn_2_1_0_offset.h12927 #define ixAZF0STREAM1_AZALIA_LATENCY_COUNTER_CONTROL … macro
Ddcn_3_1_2_offset.h14137 #define ixAZF0STREAM1_AZALIA_LATENCY_COUNTER_CONTROL … macro
Ddcn_3_1_5_offset.h14243 #define ixAZF0STREAM1_AZALIA_LATENCY_COUNTER_CONTROL … macro
Ddcn_3_0_2_offset.h15212 #define ixAZF0STREAM1_AZALIA_LATENCY_COUNTER_CONTROL … macro
Ddcn_3_1_6_offset.h14734 #define ixAZF0STREAM1_AZALIA_LATENCY_COUNTER_CONTROL … macro
Ddcn_2_0_0_offset.h16591 #define ixAZF0STREAM1_AZALIA_LATENCY_COUNTER_CONTROL … macro
Ddcn_3_0_0_offset.h16934 #define ixAZF0STREAM1_AZALIA_LATENCY_COUNTER_CONTROL … macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_12_0_offset.h16980 #define ixAZF0STREAM1_AZALIA_LATENCY_COUNTER_CONTROL … macro