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Searched refs:ixAZF0ENDPOINT6_AZALIA_F0_CODEC_PIN_CONTROL_WIDGET_CONTROL (Results 1 – 11 of 11) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_offset.h8080 #define ixAZF0ENDPOINT6_AZALIA_F0_CODEC_PIN_CONTROL_WIDGET_CONTROL … macro
Ddcn_3_0_1_offset.h12923 #define ixAZF0ENDPOINT6_AZALIA_F0_CODEC_PIN_CONTROL_WIDGET_CONTROL … macro
Ddcn_1_0_offset.h13767 #define ixAZF0ENDPOINT6_AZALIA_F0_CODEC_PIN_CONTROL_WIDGET_CONTROL … macro
Ddcn_2_1_0_offset.h13527 #define ixAZF0ENDPOINT6_AZALIA_F0_CODEC_PIN_CONTROL_WIDGET_CONTROL … macro
Ddcn_3_1_2_offset.h14737 #define ixAZF0ENDPOINT6_AZALIA_F0_CODEC_PIN_CONTROL_WIDGET_CONTROL … macro
Ddcn_3_1_5_offset.h14843 #define ixAZF0ENDPOINT6_AZALIA_F0_CODEC_PIN_CONTROL_WIDGET_CONTROL … macro
Ddcn_3_0_2_offset.h15812 #define ixAZF0ENDPOINT6_AZALIA_F0_CODEC_PIN_CONTROL_WIDGET_CONTROL … macro
Ddcn_3_1_6_offset.h15334 #define ixAZF0ENDPOINT6_AZALIA_F0_CODEC_PIN_CONTROL_WIDGET_CONTROL … macro
Ddcn_2_0_0_offset.h17191 #define ixAZF0ENDPOINT6_AZALIA_F0_CODEC_PIN_CONTROL_WIDGET_CONTROL … macro
Ddcn_3_0_0_offset.h17533 #define ixAZF0ENDPOINT6_AZALIA_F0_CODEC_PIN_CONTROL_WIDGET_CONTROL … macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_12_0_offset.h17580 #define ixAZF0ENDPOINT6_AZALIA_F0_CODEC_PIN_CONTROL_WIDGET_CONTROL … macro