Home
last modified time | relevance | path

Searched refs:ixAZALIA_CRC1_CHANNEL4 (Results 1 – 15 of 15) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_8_0_d.h5467 #define ixAZALIA_CRC1_CHANNEL4 0x4 macro
Ddce_10_0_d.h6738 #define ixAZALIA_CRC1_CHANNEL4 0x4 macro
Ddce_11_0_d.h6900 #define ixAZALIA_CRC1_CHANNEL4 0x4 macro
Ddce_11_2_d.h8245 #define ixAZALIA_CRC1_CHANNEL4 0x4 macro
Ddce_12_0_offset.h18124 #define ixAZALIA_CRC1_CHANNEL4 … macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_offset.h7407 #define ixAZALIA_CRC1_CHANNEL4 … macro
Ddcn_3_0_1_offset.h12250 #define ixAZALIA_CRC1_CHANNEL4 … macro
Ddcn_1_0_offset.h13094 #define ixAZALIA_CRC1_CHANNEL4 … macro
Ddcn_2_1_0_offset.h12854 #define ixAZALIA_CRC1_CHANNEL4 … macro
Ddcn_3_1_2_offset.h14064 #define ixAZALIA_CRC1_CHANNEL4 … macro
Ddcn_3_1_5_offset.h14170 #define ixAZALIA_CRC1_CHANNEL4 … macro
Ddcn_3_0_2_offset.h15139 #define ixAZALIA_CRC1_CHANNEL4 … macro
Ddcn_3_1_6_offset.h14661 #define ixAZALIA_CRC1_CHANNEL4 … macro
Ddcn_2_0_0_offset.h16518 #define ixAZALIA_CRC1_CHANNEL4 … macro
Ddcn_3_0_0_offset.h16861 #define ixAZALIA_CRC1_CHANNEL4 … macro