Home
last modified time | relevance | path

Searched refs:ixAZALIA_CRC1_CHANNEL1 (Results 1 – 15 of 15) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_8_0_d.h5464 #define ixAZALIA_CRC1_CHANNEL1 0x1 macro
Ddce_10_0_d.h6735 #define ixAZALIA_CRC1_CHANNEL1 0x1 macro
Ddce_11_0_d.h6897 #define ixAZALIA_CRC1_CHANNEL1 0x1 macro
Ddce_11_2_d.h8242 #define ixAZALIA_CRC1_CHANNEL1 0x1 macro
Ddce_12_0_offset.h18121 #define ixAZALIA_CRC1_CHANNEL1 … macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_offset.h7404 #define ixAZALIA_CRC1_CHANNEL1 … macro
Ddcn_3_0_1_offset.h12247 #define ixAZALIA_CRC1_CHANNEL1 … macro
Ddcn_1_0_offset.h13091 #define ixAZALIA_CRC1_CHANNEL1 … macro
Ddcn_2_1_0_offset.h12851 #define ixAZALIA_CRC1_CHANNEL1 … macro
Ddcn_3_1_2_offset.h14061 #define ixAZALIA_CRC1_CHANNEL1 … macro
Ddcn_3_1_5_offset.h14167 #define ixAZALIA_CRC1_CHANNEL1 … macro
Ddcn_3_0_2_offset.h15136 #define ixAZALIA_CRC1_CHANNEL1 … macro
Ddcn_3_1_6_offset.h14658 #define ixAZALIA_CRC1_CHANNEL1 … macro
Ddcn_2_0_0_offset.h16515 #define ixAZALIA_CRC1_CHANNEL1 … macro
Ddcn_3_0_0_offset.h16858 #define ixAZALIA_CRC1_CHANNEL1 … macro