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Searched refs:intel_dp_is_uhbr (Results 1 – 6 of 6) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/i915/display/
Dintel_dp_link_training.c387 if (intel_dp_is_uhbr(crtc_state)) in intel_dp_get_lane_adjust_train()
429 if (intel_dp_is_uhbr(crtc_state)) { in intel_dp_get_adjust_train()
551 if (intel_dp_is_uhbr(crtc_state)) { in intel_dp_set_signal_levels()
643 if (intel_dp_is_uhbr(crtc_state)) { in intel_dp_link_max_vswing_reached()
718 link_config[1] = intel_dp_is_uhbr(crtc_state) ? in intel_dp_prepare_link_train()
734 if (intel_dp_is_uhbr(crtc_state)) { in intel_dp_adjust_request_changed()
787 intel_dp_is_uhbr(crtc_state)); in intel_dp_link_training_clock_recovery()
889 if (intel_dp_is_uhbr(crtc_state)) in intel_dp_training_pattern()
954 intel_dp_is_uhbr(crtc_state)); in intel_dp_link_training_channel_equalization()
1080 if (intel_dp_is_uhbr(crtc_state) && in intel_dp_stop_link_train()
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Dintel_dp.h59 bool intel_dp_is_uhbr(const struct intel_crtc_state *crtc_state);
Dintel_dp_mst.c111 u8 link_coding_cap = intel_dp_is_uhbr(crtc_state) ? in intel_dp_mst_update_slots()
387 int start_slot = intel_dp_is_uhbr(old_crtc_state) ? 0 : 1; in intel_mst_disable_dp()
505 int start_slot = intel_dp_is_uhbr(pipe_config) ? 0 : 1; in intel_mst_pre_enable_dp()
570 if (intel_dp_is_uhbr(pipe_config)) { in intel_mst_enable_dp()
Dintel_ddi_buf_trans.c1622 intel_dp_is_uhbr(crtc_state)) in dg2_get_snps_buf_trans()
Dintel_ddi.c427 if (intel_dp_is_uhbr(crtc_state)) in intel_ddi_config_transcoder_dp2()
517 if (intel_dp_is_uhbr(crtc_state)) in intel_ddi_transcoder_func_reg_val_get()
1354 if (intel_dp_is_uhbr(crtc_state)) { in intel_ddi_dp_level()
Dintel_dp.c121 bool intel_dp_is_uhbr(const struct intel_crtc_state *crtc_state) in intel_dp_is_uhbr() function