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Searched refs:imx_clk_hw_mux2_flags (Results 1 – 6 of 6) sorted by relevance

/linux-5.19.10/drivers/clk/imx/
Dclk-imx7d.c498 …hws[IMX7D_ENET_AXI_ROOT_SRC] = imx_clk_hw_mux2_flags("enet_axi_src", base + 0x8900, 24, 3, enet_ax… in imx7d_clocks_init()
499 …hws[IMX7D_NAND_USDHC_BUS_ROOT_SRC] = imx_clk_hw_mux2_flags("nand_usdhc_src", base + 0x8980, 24, 3,… in imx7d_clocks_init()
500 …hws[IMX7D_DRAM_PHYM_ROOT_SRC] = imx_clk_hw_mux2_flags("dram_phym_src", base + 0x9800, 24, 1, dram_… in imx7d_clocks_init()
501 …hws[IMX7D_DRAM_ROOT_SRC] = imx_clk_hw_mux2_flags("dram_src", base + 0x9880, 24, 1, dram_sel, ARRAY… in imx7d_clocks_init()
502 …hws[IMX7D_DRAM_PHYM_ALT_ROOT_SRC] = imx_clk_hw_mux2_flags("dram_phym_alt_src", base + 0xa000, 24, … in imx7d_clocks_init()
503 …hws[IMX7D_DRAM_ALT_ROOT_SRC] = imx_clk_hw_mux2_flags("dram_alt_src", base + 0xa080, 24, 3, dram_a… in imx7d_clocks_init()
504 …hws[IMX7D_USB_HSIC_ROOT_SRC] = imx_clk_hw_mux2_flags("usb_hsic_src", base + 0xa100, 24, 3, usb_hsi… in imx7d_clocks_init()
505 …hws[IMX7D_PCIE_CTRL_ROOT_SRC] = imx_clk_hw_mux2_flags("pcie_ctrl_src", base + 0xa180, 24, 3, pcie_… in imx7d_clocks_init()
506 …hws[IMX7D_PCIE_PHY_ROOT_SRC] = imx_clk_hw_mux2_flags("pcie_phy_src", base + 0xa200, 24, 3, pcie_ph… in imx7d_clocks_init()
507 …hws[IMX7D_EPDC_PIXEL_ROOT_SRC] = imx_clk_hw_mux2_flags("epdc_pixel_src", base + 0xa280, 24, 3, epd… in imx7d_clocks_init()
[all …]
Dclk.h148 to_clk(imx_clk_hw_mux2_flags(name, reg, shift, width, parents, num_parents, flags))
196 imx_clk_hw_mux2_flags(name, reg, shift, width, parents, num_parents, 0)
207 #define imx_clk_hw_mux2_flags(name, reg, shift, width, parents, num_parents, flags) \ macro
Dclk-imx8mn.c463 …hws[IMX8MN_CLK_DRAM_CORE] = imx_clk_hw_mux2_flags("dram_core_clk", base + 0x9800, 24, 1, imx8mn_dr… in imx8mn_clocks_probe()
Dclk-imx8mm.c596 …hws[IMX8MM_CLK_DRAM_CORE] = imx_clk_hw_mux2_flags("dram_core_clk", base + 0x9800, 24, 1, imx8mm_dr… in imx8mm_clocks_probe()
Dclk-imx8mp.c629 …hws[IMX8MP_CLK_DRAM_CORE] = imx_clk_hw_mux2_flags("dram_core_clk", ccm_base + 0x9800, 24, 1, imx8m… in imx8mp_clocks_probe()
Dclk-imx8mq.c455 …hws[IMX8MQ_CLK_DRAM_CORE] = imx_clk_hw_mux2_flags("dram_core_clk", base + 0x9800, 24, 1, imx8mq_dr… in imx8mq_clocks_probe()