/linux-5.19.10/Documentation/devicetree/bindings/clock/ |
D | rockchip,px30-cru.yaml | 55 - const: gpll 115 clock-names = "xin24m", "gpll";
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/linux-5.19.10/drivers/clk/rockchip/ |
D | clk-rk3036.c | 21 apll, dpll, gpll, enumerator 141 [gpll] = PLL(pll_rk3036, PLL_GPLL, "gpll", mux_pll_p, 0, RK2928_PLL_CON(12),
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D | clk-rk3188.c | 19 apll, cpll, dpll, gpll, enumerator 222 [gpll] = PLL(pll_rk3066, PLL_GPLL, "gpll", mux_pll_p, 0, RK2928_PLL_CON(12), 233 [gpll] = PLL(pll_rk3066, PLL_GPLL, "gpll", mux_pll_p, 0, RK2928_PLL_CON(12),
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D | clk-rk3128.c | 18 apll, dpll, cpll, gpll, enumerator 165 [gpll] = PLL(pll_rk3036, PLL_GPLL, "gpll", mux_pll_p, 0, RK2928_PLL_CON(12),
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D | clk-rk3228.c | 19 apll, dpll, cpll, gpll, enumerator 175 [gpll] = PLL(pll_rk3036, PLL_GPLL, "gpll", mux_pll_p, 0, RK2928_PLL_CON(9),
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D | clk-rv1108.c | 19 apll, dpll, gpll, enumerator 158 [gpll] = PLL(pll_rk3399, PLL_GPLL, "gpll", mux_pll_p, 0, RV1108_PLL_CON(16),
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D | clk-rk3328.c | 21 apll, dpll, cpll, gpll, npll, enumerator 224 [gpll] = PLL(pll_rk3328, PLL_GPLL, "gpll", mux_pll_p,
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D | clk-rk3368.c | 17 apllb, aplll, dpll, cpll, gpll, npll, enumerator 138 [gpll] = PLL(pll_rk3066, PLL_GPLL, "gpll", mux_pll_p, 0, RK3368_PLL_CON(16),
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D | clk-rk3288.c | 24 apll, dpll, cpll, gpll, npll, enumerator 232 [gpll] = PLL(pll_rk3066, PLL_GPLL, "gpll", mux_pll_p, 0, RK3288_PLL_CON(12),
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D | clk-px30.c | 22 gpll, enumerator 200 [gpll] = PLL(pll_rk3328, PLL_GPLL, "gpll", mux_pll_p, 0, PX30_PMU_PLL_CON(0),
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D | clk-rk3399.c | 19 lpll, bpll, dpll, cpll, gpll, npll, vpll, enumerator 227 [gpll] = PLL(pll_rk3399, PLL_GPLL, "gpll", mux_pll_p, 0, RK3399_PLL_CON(32),
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D | clk-rk3568.c | 23 apll, dpll, gpll, cpll, npll, vpll, enumerator 330 [gpll] = PLL(pll_rk3328, PLL_GPLL, "gpll", mux_pll_p,
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/linux-5.19.10/drivers/clk/samsung/ |
D | clk-exynos5250.c | 105 apll, mpll, cpll, epll, vpll, gpll, bpll, enumerator 739 [gpll] = PLL(pll_35xx, CLK_FOUT_GPLL, "fout_gpll", "fin_pll", GPLL_LOCK,
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/linux-5.19.10/drivers/clk/sprd/ |
D | sc9863a-clk.c | 144 static SPRD_PLL_HW(gpll, "gpll", &gpll_gate.common.hw, 0x38, 3, itable, 155 &gpll.common, 184 [CLK_GPLL] = &gpll.common.hw, 548 { .hw = &gpll.common.hw },
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/linux-5.19.10/arch/arm64/boot/dts/rockchip/ |
D | px30.dtsi | 785 clock-names = "xin24m", "gpll";
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