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/linux-5.19.10/arch/sparc/kernel/
Detrap_64.S33 etrap_irq: clr %g3
36 or %g1, %g3, %g1
37 sllx %g2, 20, %g3
39 or %g1, %g3, %g1
49 sethi %hi(TSTATE_PEF), %g3
51 and %g1, %g3, %g3
52 brnz,pn %g3, 1f
55 1: rdpr %tpc, %g3
59 stx %g3, [%g2 + STACKFRAME_SZ + PT_V9_TPC]
60 rd %y, %g3
[all …]
Dwinfixup.S50 sll %g1, 3, %g3
51 add %g6, %g3, %g3
52 stx %sp, [%g3 + TI_RWIN_SPTRS]
53 sll %g1, 7, %g3
55 add %g6, %g3, %g3
56 stx %l0, [%g3 + TI_REG_WINDOW + 0x00]
57 stx %l1, [%g3 + TI_REG_WINDOW + 0x08]
58 stx %l2, [%g3 + TI_REG_WINDOW + 0x10]
59 stx %l3, [%g3 + TI_REG_WINDOW + 0x18]
60 stx %l4, [%g3 + TI_REG_WINDOW + 0x20]
[all …]
Dsun4v_ivec.S33 sub %g4, %g5, %g3
34 srlx %g3, TRAP_BLOCK_SZ_SHIFT, %g3
39 sllx %g3, 3, %g3
40 add %g5, %g3, %g5
41 ldx [%g5], %g3
42 add %g3, 1, %g3
43 stx %g3, [%g5]
56 ldxa [%g7 + %g2] ASI_PHYS_USE_EC, %g3
58 srlx %g3, 32, %g5
61 srl %g3, 0, %g3
[all …]
Dspiterrs.S27 rdpr %tt, %g3
28 and %g3, 0x1ff, %g3 ! Paranoia
29 sllx %g3, SFSTAT_TRAP_TYPE_SHIFT, %g3
30 or %g4, %g3, %g4
31 rdpr %tl, %g3
32 cmp %g3, 1
33 mov 1, %g3
35 sllx %g3, SFSTAT_TL_GT_ONE_SHIFT, %g3
37 or %g4, %g3, %g4
52 1: ldxa [%g0] ASI_UDBH_ERROR_R, %g3
[all …]
Duna_asm_64.S14 mov %o2, %g3
19 srlx %g3, 24, %g2
20 srlx %g3, 56, %g1
21 srlx %g3, 48, %g7
23 srlx %g3, 40, %g1
25 srlx %g3, 32, %g7
28 srlx %g3, 16, %g1
30 srlx %g3, 8, %g7
34 11: stba %g3, [%o0 + 7] %asi
35 1: srl %g3, 16, %g7
[all …]
Dsun4v_tlb_miss.S57 COMPUTE_TSB_PTR(%g1, %g4, PAGE_SHIFT, %g3, %g7)
63 mov FAULT_CODE_ITLB, %g3
64 andcc %g3, _PAGE_EXEC_4V, %g0
66 mov FAULT_CODE_ITLB, %g3
82 mov %g3, %o2 ! PTE
103 COMPUTE_TSB_PTR(%g1, %g4, PAGE_SHIFT, %g3, %g7)
109 mov FAULT_CODE_DTLB, %g3
125 mov %g3, %o2 ! PTE
159 mov FAULT_CODE_ITLB, %g3
171 mov FAULT_CODE_DTLB, %g3
[all …]
Divec.S16 mov 0x40, %g3
17 ldxa [%g3 + %g0] ASI_INTR_R, %g3
19 cmp %g3, %g4
21 srlx %g3, 32, %g5
27 sllx %g3, 4, %g3
28 add %g2, %g3, %g3
33 stxa %g5, [%g3] ASI_PHYS_USE_EC
34 stx %g3, [%g6]
40 srl %g3, 0, %g3
50 1: jmpl %g3, %g0
Dhead_32.S118 mov %o7, %g3
130 cmp %g3, %g5
153 set t_irq14, %g3
155 sub %g3, %l6, %g3 ! translate to physical
156 ldd [%g3], %g4
158 ldd [%g3+8], %g4
165 set t_irq14, %g3
166 sub %g3, %l6, %g3
168 std %g4, [%g3]
170 std %g4, [%g3 + 0x8] ! Copy proms handler
[all …]
Dtrampoline_32.S30 sethi %hi(trapbase_cpu1), %g3
32 or %g3, %lo(trapbase_cpu1), %g3
35 sethi %hi(trapbase_cpu2), %g3
37 or %g3, %lo(trapbase_cpu2), %g3
40 sethi %hi(trapbase_cpu3), %g3
42 or %g3, %lo(trapbase_cpu3), %g3
56 wr %g3, 0x0, %tbr
61 srl %g3, 10, %g4
115 set SUN4D_BOOTBUS_CPUID, %g3
116 lduba [%g3] ASI_M_CTL, %g3
[all …]
Dfpu_traps.S66 1: mov SECONDARY_CONTEXT, %g3
71 661: ldxa [%g3] ASI_DMMU, %g5
74 ldxa [%g3] ASI_MMU, %g5
80 661: stxa %g2, [%g3] ASI_DMMU
83 stxa %g2, [%g3] ASI_MMU
109 mov SECONDARY_CONTEXT, %g3
112 661: ldxa [%g3] ASI_DMMU, %g5
115 ldxa [%g3] ASI_MMU, %g5
122 661: stxa %g2, [%g3] ASI_DMMU
125 stxa %g2, [%g3] ASI_MMU
[all …]
/linux-5.19.10/arch/sparc/power/
Dhibernate_asm.S19 setuw saved_context, %g3
23 stx %g2, [%g3 + SC_REG_CWP]
25 stx %g2, [%g3 + SC_REG_WSTATE]
26 stx %fp, [%g3 + SC_REG_FP]
30 stx %g2, [%g3 + SC_REG_TICK]
32 stx %g2, [%g3 + SC_REG_PSTATE]
35 stx %g4, [%g3 + SC_REG_G4]
36 stx %g5, [%g3 + SC_REG_G5]
37 stx %g6, [%g3 + SC_REG_G6]
61 setuw (PAGE_SIZE-8), %g3
[all …]
/linux-5.19.10/drivers/gpu/drm/i915/gt/shaders/clear_kernel/
Dhsw.asm48 mov(8) g3<1>UD 0x00000000UD { align1 1Q };
49 shr(1) g3<1>D sr0<0,1,0>D 12D { align1 1N };
50 and(1) g3<1>D g3<0,1,0>D 1D { align1 1N }; /* g3 has HSID */
51 shr(1) g3.1<1>D sr0<0,1,0>D 13D { align1 1N };
52 and(1) g3.1<1>D g3.1<0,1,0>D 3D { align1 1N }; /* g3.1 has sliceID …
53 mul(1) g3.5<1>D g3.1<0,1,0>D g1.10<0,1,0>UW { align1 1N };
54 add(1) g3<1>D g3<0,1,0>D g3.5<0,1,0>D { align1 1N }; /* g3 = sliceID * Su…
55 shr(1) g3.2<1>D sr0<0,1,0>D 8D { align1 1N };
56 and(1) g3.2<1>D g3.2<0,1,0>D 15D { align1 1N }; /* g3.2 = EUID */
57 mul(1) g3.4<1>D g3<0,1,0>D 16D { align1 1N };
[all …]
Divb.asm48 mov(8) g3<1>UD 0x00000000UD { align1 1Q };
49 shr(1) g3<1>D sr0<0,1,0>D 12D { align1 1N };
50 and(1) g3<1>D g3<0,1,0>D 1D { align1 1N }; /* g3 has HSID */
51 shr(1) g3.1<1>D sr0<0,1,0>D 13D { align1 1N };
52 and(1) g3.1<1>D g3.1<0,1,0>D 3D { align1 1N }; /* g3.1 has sliceID …
53 mul(1) g3.5<1>D g3.1<0,1,0>D g1.10<0,1,0>UW { align1 1N };
54 add(1) g3<1>D g3<0,1,0>D g3.5<0,1,0>D { align1 1N }; /* g3 = sliceID * Su…
55 shr(1) g3.2<1>D sr0<0,1,0>D 8D { align1 1N };
56 and(1) g3.2<1>D g3.2<0,1,0>D 15D { align1 1N }; /* g3.2 = EUID */
57 mul(1) g3.4<1>D g3<0,1,0>D 16D { align1 1N };
[all …]
/linux-5.19.10/arch/sparc/lib/
Dstrncmp_32.S12 mov %o0, %g3
20 ldub [%g3], %o3
24 add %g3, 1, %g3
33 ldub [%g3], %o3
40 add %g3,1, %g3
49 ldub [%g3], %o3
56 add %g3, 1, %g3
65 ldub [%g3], %o3
72 add %g3, 1, %g3
90 ldub [%g3], %o3
[all …]
Dmemcpy.S157 MOVE_BIGCHUNK(o1, o0, 0x00, o2, o3, o4, o5, g2, g3, g4, g5)
158 MOVE_BIGCHUNK(o1, o0, 0x20, o2, o3, o4, o5, g2, g3, g4, g5)
159 MOVE_BIGCHUNK(o1, o0, 0x40, o2, o3, o4, o5, g2, g3, g4, g5)
160 MOVE_BIGCHUNK(o1, o0, 0x60, o2, o3, o4, o5, g2, g3, g4, g5)
181 MOVE_LASTCHUNK(o1, o0, 0x60, g2, g3, g4, g5)
182 MOVE_LASTCHUNK(o1, o0, 0x50, g2, g3, g4, g5)
183 MOVE_LASTCHUNK(o1, o0, 0x40, g2, g3, g4, g5)
184 MOVE_LASTCHUNK(o1, o0, 0x30, g2, g3, g4, g5)
185 MOVE_LASTCHUNK(o1, o0, 0x20, g2, g3, g4, g5)
186 MOVE_LASTCHUNK(o1, o0, 0x10, g2, g3, g4, g5)
[all …]
DVISsave.S38 vis1: ldub [%g6 + TI_FPSAVED], %g3
40 or %g3, %o5, %g3
41 stb %g3, [%g6 + TI_FPSAVED]
42 rd %gsr, %g3
46 stx %g3, [%g6 + TI_GSR]
47 2: add %g6, %g1, %g3
50 stb %o5, [%g3 + TI_FPSAVED]
52 add %g6, %g1, %g3
53 stx %g2, [%g3 + TI_GSR]
64 add %g6, TI_FPREGS+0x40, %g3
[all …]
DNG2patch.S15 sethi %hi(BRANCH_ALWAYS), %g3; \
18 or %g3, %lo(BRANCH_ALWAYS), %g3; \
19 or %g3, %g1, %g3; \
20 stw %g3, [%g2]; \
21 sethi %hi(NOP), %g3; \
22 or %g3, %lo(NOP), %g3; \
23 stw %g3, [%g2 + 0x4]; \
DU3patch.S15 sethi %hi(BRANCH_ALWAYS), %g3; \
18 or %g3, %lo(BRANCH_ALWAYS), %g3; \
19 or %g3, %g1, %g3; \
20 stw %g3, [%g2]; \
21 sethi %hi(NOP), %g3; \
22 or %g3, %lo(NOP), %g3; \
23 stw %g3, [%g2 + 0x4]; \
DGENpatch.S15 sethi %hi(BRANCH_ALWAYS), %g3; \
18 or %g3, %lo(BRANCH_ALWAYS), %g3; \
19 or %g3, %g1, %g3; \
20 stw %g3, [%g2]; \
21 sethi %hi(NOP), %g3; \
22 or %g3, %lo(NOP), %g3; \
23 stw %g3, [%g2 + 0x4]; \
DNGpatch.S15 sethi %hi(BRANCH_ALWAYS), %g3; \
18 or %g3, %lo(BRANCH_ALWAYS), %g3; \
19 or %g3, %g1, %g3; \
20 stw %g3, [%g2]; \
21 sethi %hi(NOP), %g3; \
22 or %g3, %lo(NOP), %g3; \
23 stw %g3, [%g2 + 0x4]; \
Dfls.S13 .register %g3, #scratch
17 sethi %hi(0xffff0000), %g3
19 andcc %o0, %g3, %g0
22 sethi %hi(0xff000000), %g3
23 andcc %g2, %g3, %g0
25 sethi %hi(0xf0000000), %g3
32 sethi %hi(0xf0000000), %g3
34 andcc %g2, %g3, %g0
36 sethi %hi(0xc0000000), %g3
42 andcc %g2, %g3, %g0
[all …]
DM7patch.S17 sethi %hi(BRANCH_ALWAYS), %g3; \
20 or %g3, %lo(BRANCH_ALWAYS), %g3; \
21 or %g3, %g1, %g3; \
22 stw %g3, [%g2]; \
23 sethi %hi(NOP), %g3; \
24 or %g3, %lo(NOP), %g3; \
25 stw %g3, [%g2 + 0x4]; \
/linux-5.19.10/arch/sparc/mm/
Dviking.S40 sub %o0, %g2, %g3
41 srl %g3, 12, %g1 ! ppage >> 12
58 cmp %g3, %g1 ! ptag == ppage?
65 ld [%g2], %g3
66 ld [%g2 + %g7], %g3
68 ld [%g2], %g3
69 ld [%g2 + %g7], %g3
71 ld [%g2], %g3
72 ld [%g2 + %g7], %g3
74 ld [%g2], %g3
[all …]
Dultra.S39 mov 0x50, %g3
40 stxa %g0, [%g3] ASI_DMMU_DEMAP
41 stxa %g0, [%g3] ASI_IMMU_DEMAP
42 sethi %hi(KERNBASE), %g3
43 flush %g3
177 stxa %g0, [%g3] ASI_DMMU_DEMAP
178 stxa %g0, [%g3] ASI_IMMU_DEMAP
256 mov 0x40, %g3
262 stxa %g0, [%g3] ASI_DMMU_DEMAP
263 stxa %g0, [%g3] ASI_IMMU_DEMAP
[all …]
/linux-5.19.10/arch/sparc/include/asm/
Dttable.h96 mov TSTATE_SYSCALL, %g3; \
105 mov handler, %g3; \
300 mov 0x08, %g3; \
301 stxa %l1, [%g1 + %g3] ASI; \
304 stxa %l3, [%g1 + %g3] ASI; \
307 stxa %l5, [%g1 + %g3] ASI; \
310 stxa %l7, [%g1 + %g3] ASI; \
313 stxa %i1, [%g1 + %g3] ASI; \
316 stxa %i3, [%g1 + %g3] ASI; \
319 stxa %i5, [%g1 + %g3] ASI; \
[all …]

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