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Searched refs:enable_val (Results 1 – 25 of 30) sorted by relevance

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/linux-5.19.10/drivers/phy/samsung/
Dphy-exynos-mipi-video.c46 u32 enable_val; member
63 .enable_val = EXYNOS4_PHY_ENABLE,
72 .enable_val = EXYNOS4_PHY_ENABLE,
81 .enable_val = EXYNOS4_PHY_ENABLE,
90 .enable_val = EXYNOS4_PHY_ENABLE,
108 .enable_val = EXYNOS4_PHY_ENABLE,
117 .enable_val = EXYNOS4_PHY_ENABLE,
126 .enable_val = EXYNOS4_PHY_ENABLE,
135 .enable_val = EXYNOS4_PHY_ENABLE,
144 .enable_val = EXYNOS4_PHY_ENABLE,
[all …]
/linux-5.19.10/drivers/leds/
Dleds-lm36274.c54 int enable_val = 0; in lm36274_init() local
58 enable_val |= (1 << chip->led_sources[i]); in lm36274_init()
60 if (!enable_val) { in lm36274_init()
65 enable_val |= LM36274_BL_EN; in lm36274_init()
67 return regmap_write(chip->regmap, LM36274_REG_BL_EN, enable_val); in lm36274_init()
/linux-5.19.10/drivers/clocksource/
Djcore-pit.c36 u32 enable_val; member
72 writel(pit->enable_val, pit->base + REG_PITEN); in jcore_pit_set()
138 u32 irqprio, enable_val; in jcore_pit_init() local
211 enable_val = (1U << PIT_ENABLE_SHIFT) in jcore_pit_init()
236 pit->enable_val = enable_val; in jcore_pit_init()
/linux-5.19.10/drivers/clk/
Dclk-gate_test.c165 u32 enable_val = BIT(5); in clk_gate_test_enable() local
169 KUNIT_EXPECT_EQ(test, enable_val, ctx->fake_reg); in clk_gate_test_enable()
182 u32 enable_val = BIT(5); in clk_gate_test_disable() local
186 KUNIT_ASSERT_EQ(test, enable_val, ctx->fake_reg); in clk_gate_test_disable()
245 u32 enable_val = 0; in clk_gate_test_invert_enable() local
249 KUNIT_EXPECT_EQ(test, enable_val, ctx->fake_reg); in clk_gate_test_invert_enable()
262 u32 enable_val = 0; in clk_gate_test_invert_disable() local
266 KUNIT_ASSERT_EQ(test, enable_val, ctx->fake_reg); in clk_gate_test_invert_disable()
318 u32 enable_val = BIT(9) | BIT(9 + 16); in clk_gate_test_hiword_enable() local
322 KUNIT_EXPECT_EQ(test, enable_val, ctx->fake_reg); in clk_gate_test_hiword_enable()
[all …]
/linux-5.19.10/drivers/regulator/
Dstpmic1_regulator.c211 .enable_val = 1, \
231 .enable_val = 1, \
253 .enable_val = 1, \
273 .enable_val = 1, \
294 .enable_val = 1, \
311 .enable_val = BOOST_ENABLED, \
328 .enable_val = USBSW_OTG_SWITCH_ENABLED, \
348 .enable_val = SWIN_SWOUT_ENABLED, \
Drk808-regulator.c86 .enable_val = (_enval), \
110 .enable_val = (_enval), \
142 .enable_val = (_enval), \
523 if (rdev->desc->enable_val) in rk8xx_is_enabled_wmsk_regmap()
524 return val != rdev->desc->enable_val; in rk8xx_is_enabled_wmsk_regmap()
527 if (rdev->desc->enable_val) in rk8xx_is_enabled_wmsk_regmap()
528 return val == rdev->desc->enable_val; in rk8xx_is_enabled_wmsk_regmap()
865 .enable_val = ENABLE_MASK(RK817_ID_DCDC1),
888 .enable_val = ENABLE_MASK(RK817_ID_DCDC2),
911 .enable_val = ENABLE_MASK(RK817_ID_DCDC3),
[all …]
Dhelpers.c39 if (rdev->desc->enable_val) in regulator_is_enabled_regmap()
40 return val != rdev->desc->enable_val; in regulator_is_enabled_regmap()
43 if (rdev->desc->enable_val) in regulator_is_enabled_regmap()
44 return val == rdev->desc->enable_val; in regulator_is_enabled_regmap()
66 val = rdev->desc->enable_val; in regulator_enable_regmap()
90 val = rdev->desc->enable_val; in regulator_disable_regmap()
Dcpcap-regulator.c122 .enable_val = (mode_val), \
178 if (rdev->desc->enable_val & CPCAP_REG_OFF_MODE_SEC) { in cpcap_regulator_enable()
198 if (rdev->desc->enable_val & CPCAP_REG_OFF_MODE_SEC) { in cpcap_regulator_disable()
206 if (error && (rdev->desc->enable_val & CPCAP_REG_OFF_MODE_SEC)) { in cpcap_regulator_disable()
Dbd9576-regulator.c609 .enable_val = BD957X_REGULATOR_DIS_VAL,
632 .enable_val = BD957X_REGULATOR_DIS_VAL,
654 .enable_val = BD957X_REGULATOR_DIS_VAL,
677 .enable_val = BD957X_REGULATOR_DIS_VAL,
700 .enable_val = BD957X_REGULATOR_DIS_VAL,
721 .enable_val = BD957X_REGULATOR_DIS_VAL,
Dmax77693-regulator.c177 .enable_val = CHG_CNFG_00_CHG_MASK | CHG_CNFG_00_BUCK_MASK,
217 .enable_val = MAX77843_CHG_MASK,
Dstw481x-vmmc.c50 .enable_val = STW_CONF1_PDN_VMMC,
Dtps6105x-regulator.c51 .enable_val = TPS6105X_REG0_MODE_VOLTAGE <<
Dpf8x00-regulator.c396 .enable_val = 0x2, \
429 .enable_val = 0x3, \
461 .enable_val = 0x3, \
Ds5m8767.c927 int enable_reg, enable_val; in s5m8767_pmic_probe() local
944 &enable_val); in s5m8767_pmic_probe()
951 regulators[id].enable_val = enable_val; in s5m8767_pmic_probe()
Dsm5703-regulator.c62 .enable_val = SM5703_OPERATION_MODE_USB_OTG_MODE, \
Dlp87565-regulator.c42 .enable_val = _ev, \
Dpbias-regulator.c210 desc->enable_val = info->enable; in pbias_regulator_probe()
Duniphier-regulator.c143 .enable_val = USB3VBUS_REG_EN | USB3VBUS_REG,
Dsc2731-regulator.c142 .enable_val = 0, \
Dmax20086-regulator.c86 .enable_val = 1 << ((n) - 1), \
Dqcom-labibb-regulator.c694 .enable_val = LABIBB_CONTROL_ENABLE,
721 .enable_val = LABIBB_CONTROL_ENABLE,
Dpfuze100-regulator.c344 .enable_val = 0x8, \
817 desc->enable_val = 0x8; in pfuze100_regulator_probe()
Dpalmas-regulator.c476 pmic->desc[id].enable_val = pmic->current_reg_mode[id]; in palmas_set_mode_smps()
1259 desc->enable_val = SMPS_CTRL_MODE_ON; in palmas_smps_registration()
1364 desc->enable_val = SMPS_CTRL_MODE_ON; in tps65917_smps_registration()
/linux-5.19.10/drivers/media/cec/platform/seco/
Dseco-cec.c141 u16 enable_val = 0; in secocec_adap_log_addr() local
145 status = smb_rd16(SECOCEC_ENABLE_REG_1, &enable_val); in secocec_adap_log_addr()
150 enable_val & ~SECOCEC_ENABLE_REG_1_CEC); in secocec_adap_log_addr()
163 enable_val | SECOCEC_ENABLE_REG_1_CEC); in secocec_adap_log_addr()
/linux-5.19.10/include/linux/regulator/
Ddriver.h404 unsigned int enable_val; member

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