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Searched refs:dsc_enc_caps (Results 1 – 3 of 3) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/display/dc/dsc/
Ddc_dsc.c55 const struct dsc_enc_caps *dsc_caps,
68 struct dsc_enc_caps *dsc_enc_caps,
73 const struct dsc_enc_caps *dsc_enc_caps,
75 struct dsc_enc_caps *dsc_common_caps);
79 const struct dsc_enc_caps *dsc_enc_caps,
352 struct dsc_enc_caps dsc_enc_caps; in dc_dsc_compute_bandwidth_range() local
353 struct dsc_enc_caps dsc_common_caps; in dc_dsc_compute_bandwidth_range()
356 get_dsc_enc_caps(dsc, &dsc_enc_caps, timing->pix_clk_100hz); in dc_dsc_compute_bandwidth_range()
358 is_dsc_possible = intersect_dsc_caps(dsc_sink_caps, &dsc_enc_caps, in dc_dsc_compute_bandwidth_range()
362 is_dsc_possible = setup_dsc_config(dsc_sink_caps, &dsc_enc_caps, 0, timing, in dc_dsc_compute_bandwidth_range()
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/linux-5.19.10/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_dsc.c42 static void dsc2_get_enc_caps(struct dsc_enc_caps *dsc_enc_caps, int pixel_clock_100Hz);
110 static void dsc2_get_enc_caps(struct dsc_enc_caps *dsc_enc_caps, int pixel_clock_100Hz) in dsc2_get_enc_caps() argument
112 dsc_enc_caps->dsc_version = 0x21; /* v1.2 - DP spec defined it in reverse order and we kept it */ in dsc2_get_enc_caps()
114 dsc_enc_caps->slice_caps.bits.NUM_SLICES_1 = 1; in dsc2_get_enc_caps()
115 dsc_enc_caps->slice_caps.bits.NUM_SLICES_2 = 1; in dsc2_get_enc_caps()
116 dsc_enc_caps->slice_caps.bits.NUM_SLICES_3 = 1; in dsc2_get_enc_caps()
117 dsc_enc_caps->slice_caps.bits.NUM_SLICES_4 = 1; in dsc2_get_enc_caps()
119 dsc_enc_caps->lb_bit_depth = 13; in dsc2_get_enc_caps()
120 dsc_enc_caps->is_block_pred_supported = true; in dsc2_get_enc_caps()
122 dsc_enc_caps->color_formats.bits.RGB = 1; in dsc2_get_enc_caps()
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/linux-5.19.10/drivers/gpu/drm/amd/display/dc/inc/hw/
Ddsc.h83 struct dsc_enc_caps { struct
98 void (*dsc_get_enc_caps)(struct dsc_enc_caps *dsc_enc_caps, int pixel_clock_100Hz); argument