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Searched refs:dsc_caps (Results 1 – 8 of 8) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/display/amdgpu_dm/
Damdgpu_dm_mst_types.c194 u8 dsc_caps[16] = { 0 }; in validate_dsc_caps_on_connector() local
216 if (drm_dp_dpcd_read(aconnector->dsc_aux, DP_DSC_SUPPORT, dsc_caps, 16) < 0) in validate_dsc_caps_on_connector()
224 dsc_caps, dsc_branch_dec_caps, in validate_dsc_caps_on_connector()
225 &dc_sink->dsc_caps.dsc_dec_caps)) in validate_dsc_caps_on_connector()
327 memset(&aconnector->dc_sink->dsc_caps, in dm_dp_mst_get_modes()
328 0, sizeof(aconnector->dc_sink->dsc_caps)); in dm_dp_mst_get_modes()
599 &params[i].sink->dsc_caps.dsc_dec_caps, in set_dsc_configs_from_fairness_vars()
646 &param.sink->dsc_caps.dsc_dec_caps, in bpp_x16_from_pbn()
863 params[count].compression_possible = stream->sink->dsc_caps.dsc_dec_caps.is_dsc_supported; in compute_mst_dsc_configs_for_link()
870 &stream->sink->dsc_caps.dsc_dec_caps, in compute_mst_dsc_configs_for_link()
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Damdgpu_dm.c6184 struct dsc_dec_dpcd_caps *dsc_caps) in update_dsc_caps() argument
6187 dsc_caps->is_dsc_supported = false; in update_dsc_caps()
6194 aconnector->dc_link->dpcd_caps.dsc_caps.dsc_basic_caps.raw, in update_dsc_caps()
6195 aconnector->dc_link->dpcd_caps.dsc_caps.dsc_branch_decoder_caps.raw, in update_dsc_caps()
6196 dsc_caps); in update_dsc_caps()
6202 struct dsc_dec_dpcd_caps *dsc_caps, in apply_dsc_policy_for_edp() argument
6217 if (edp_max_bpp_x16 > dsc_caps->edp_max_bits_per_pixel) in apply_dsc_policy_for_edp()
6218 edp_max_bpp_x16 = dsc_caps->edp_max_bits_per_pixel; in apply_dsc_policy_for_edp()
6226 dsc_caps, in apply_dsc_policy_for_edp()
6232 dsc_caps, in apply_dsc_policy_for_edp()
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Damdgpu_dm_debugfs.c1207 is_dsc_supported = dpcd_caps.dsc_caps.dsc_basic_caps.raw[0] & 0x1; in dp_dsc_fec_support_show()
/linux-5.19.10/drivers/gpu/drm/amd/display/dc/dsc/
Ddc_dsc.c55 const struct dsc_enc_caps *dsc_caps,
501 const struct dsc_enc_caps *dsc_caps, in decide_dsc_bandwidth_range() argument
518 else if (dsc_caps->edp_sink_max_bits_per_pixel) { in decide_dsc_bandwidth_range()
520 range->max_target_bpp_x16 = MIN(dsc_caps->edp_sink_max_bits_per_pixel, in decide_dsc_bandwidth_range()
536 range->max_target_bpp_x16, num_slices_h, dsc_caps->is_dp); in decide_dsc_bandwidth_range()
540 range->min_target_bpp_x16, num_slices_h, dsc_caps->is_dp); in decide_dsc_bandwidth_range()
/linux-5.19.10/drivers/gpu/drm/amd/display/dc/
Ddc.h1226 struct dpcd_dsc_capabilities dsc_caps; member
1333 struct dc_sink_dsc_caps dsc_caps; member
/linux-5.19.10/drivers/gpu/drm/amd/display/dc/core/
Ddc_link_dp.c5587 memset(&link->dpcd_caps.dsc_caps, '\0', in retrieve_link_cap()
5588 sizeof(link->dpcd_caps.dsc_caps)); in retrieve_link_cap()
5600 link->dpcd_caps.dsc_caps.dsc_basic_caps.raw, in retrieve_link_cap()
5601 sizeof(link->dpcd_caps.dsc_caps.dsc_basic_caps.raw)); in retrieve_link_cap()
5606 link->dpcd_caps.dsc_caps.dsc_branch_decoder_caps.raw, in retrieve_link_cap()
5607 sizeof(link->dpcd_caps.dsc_caps.dsc_branch_decoder_caps.raw)); in retrieve_link_cap()
5610 link->dpcd_caps.dsc_caps.dsc_branch_decoder_caps.fields.BRANCH_OVERALL_THROUGHPUT_0); in retrieve_link_cap()
5612 link->dpcd_caps.dsc_caps.dsc_branch_decoder_caps.fields.BRANCH_OVERALL_THROUGHPUT_1); in retrieve_link_cap()
5614 link->dpcd_caps.dsc_caps.dsc_branch_decoder_caps.fields.BRANCH_MAX_LINE_WIDTH); in retrieve_link_cap()
5626 link->dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_SUPPORT)) { in retrieve_link_cap()
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Ddc_link.c816 link->dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_SUPPORT && in apply_dpia_mst_dsc_always_on_wa()
2875 dpcd_caps->dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_PASSTHROUGH_SUPPORT == 0 && in dp_active_dongle_validate_timing()
4652 && (link->dpcd_caps.dsc_caps.dsc_basic_caps.fields. in dc_link_should_enable_fec()
/linux-5.19.10/drivers/gpu/drm/amd/display/modules/power/
Dpower_helpers.c815 if (link->dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_SUPPORT) in is_psr_su_specific_panel()