Home
last modified time | relevance | path

Searched refs:dsaf_set_bit (Results 1 – 7 of 7) sorted by relevance

/linux-5.19.10/drivers/net/ethernet/hisilicon/hns/
Dhns_dsaf_main.c336 dsaf_set_bit(o_sbm_cfg, DSAF_SBM_CFG_EN_S, 1); in hns_dsaf_sbm_cfg()
337 dsaf_set_bit(o_sbm_cfg, DSAF_SBM_CFG_SHCUT_EN_S, 0); in hns_dsaf_sbm_cfg()
627 dsaf_set_bit(mcast_cfg4, DSAF_TBL_MCAST_CFG4_ITEM_VLD_S, in hns_dsaf_tbl_tcam_mcast_cfg()
629 dsaf_set_bit(mcast_cfg4, DSAF_TBL_MCAST_CFG4_OLD_EN_S, in hns_dsaf_tbl_tcam_mcast_cfg()
661 dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_MAC_DISCARD_S, in hns_dsaf_tbl_tcam_ucast_cfg()
663 dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_ITEM_VLD_S, in hns_dsaf_tbl_tcam_ucast_cfg()
665 dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_OLD_EN_S, in hns_dsaf_tbl_tcam_ucast_cfg()
667 dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_DVC_S, in hns_dsaf_tbl_tcam_ucast_cfg()
686 dsaf_set_bit(tbl_line, DSAF_TBL_LINE_CFG_MAC_DISCARD_S, in hns_dsaf_tbl_line_cfg()
688 dsaf_set_bit(tbl_line, DSAF_TBL_LINE_CFG_DVC_S, in hns_dsaf_tbl_line_cfg()
[all …]
Dhns_dsaf_xgmac.c125 dsaf_set_bit(val, XGMAC_UNIDIR_EN_B, 0); in hns_xgmac_lf_rf_control_init()
126 dsaf_set_bit(val, XGMAC_RF_TX_EN_B, 1); in hns_xgmac_lf_rf_control_init()
187 dsaf_set_bit(origin, XGMAC_PMA_FEC_CTL_TX_B, !!tx_value); in hns_xgmac_pma_fec_enable()
188 dsaf_set_bit(origin, XGMAC_PMA_FEC_CTL_RX_B, !!rx_value); in hns_xgmac_pma_fec_enable()
236 dsaf_set_bit(origin, XGMAC_CTL_TX_PAD_B, !!newval); in hns_xgmac_config_pad_and_crc()
237 dsaf_set_bit(origin, XGMAC_CTL_TX_FCS_B, !!newval); in hns_xgmac_config_pad_and_crc()
238 dsaf_set_bit(origin, XGMAC_CTL_RX_FCS_B, !!newval); in hns_xgmac_config_pad_and_crc()
253 dsaf_set_bit(origin, XGMAC_PAUSE_CTL_TX_B, !!tx_en); in hns_xgmac_pausefrm_cfg()
254 dsaf_set_bit(origin, XGMAC_PAUSE_CTL_RX_B, !!rx_en); in hns_xgmac_pausefrm_cfg()
Dhns_dsaf_gmac.c150 dsaf_set_bit(tx_ctrl, GMAC_TX_PAD_EN_B, !!newval); in hns_gmac_config_pad_and_crc()
151 dsaf_set_bit(tx_ctrl, GMAC_TX_CRC_ADD_B, !!newval); in hns_gmac_config_pad_and_crc()
169 dsaf_set_bit(tx_loop_pkt_pri, GMAC_TX_LOOP_PKT_EN_B, 1); in hns_gmac_tx_loop_pkt_dis()
170 dsaf_set_bit(tx_loop_pkt_pri, GMAC_TX_LOOP_PKT_HIG_PRI_B, 0); in hns_gmac_tx_loop_pkt_dis()
229 dsaf_set_bit(pause_en, GMAC_PAUSE_EN_RX_FDFC_B, !!rx_pause_en); in hns_gmac_pause_frm_cfg()
230 dsaf_set_bit(pause_en, GMAC_PAUSE_EN_TX_FDFC_B, !!tx_pause_en); in hns_gmac_pause_frm_cfg()
Dhns_dsaf_misc.c135 dsaf_set_bit(value, DSAF_LED_LINK_B, link_status); in hns_cpld_set_led()
138 dsaf_set_bit(value, DSAF_LED_DATA_B, data); in hns_cpld_set_led()
205 dsaf_set_bit(val, DSAF_LED_ANCHOR_B, CPLD_LED_ON_VALUE); in cpld_set_led_id()
211 dsaf_set_bit(mac_cb->cpld_led_value, DSAF_LED_ANCHOR_B, in cpld_set_led_id()
Dhns_dsaf_main.h408 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_TCAM_LOAD_S, 1); in hns_dsaf_tbl_tcam_load_pul()
410 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_TCAM_LOAD_S, 0); in hns_dsaf_tbl_tcam_load_pul()
Dhns_dsaf_ppe.c264 dsaf_set_bit(vld_msk, 0, 1); in hns_ppe_exc_irq_en()
265 dsaf_set_bit(vld_msk, 1, 1); in hns_ppe_exc_irq_en()
266 dsaf_set_bit(vld_msk, 7, 1); in hns_ppe_exc_irq_en()
Dhns_dsaf_reg.h1049 #define dsaf_set_bit(origin, shift, val) \ macro