| /linux-5.19.10/arch/arm64/include/asm/vdso/ |
| D | compat_barrier.h | 17 #ifdef dmb
18 #undef dmb
21 #define dmb(option) __asm__ __volatile__ ("dmb " #option : : : "memory") macro
23 #define aarch32_smp_mb() dmb(ish)
24 #define aarch32_smp_rmb() dmb(ishld)
25 #define aarch32_smp_wmb() dmb(ishst)
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| /linux-5.19.10/drivers/s390/net/ |
| D | ism_drv.c | 218 static void ism_free_dmb(struct ism_dev *ism, struct smcd_dmb *dmb) in ism_free_dmb() argument
220 clear_bit(dmb->sba_idx, ism->sba_bitmap); in ism_free_dmb()
221 dma_free_coherent(&ism->pdev->dev, dmb->dmb_len, in ism_free_dmb()
222 dmb->cpu_addr, dmb->dma_addr); in ism_free_dmb()
225 static int ism_alloc_dmb(struct ism_dev *ism, struct smcd_dmb *dmb) in ism_alloc_dmb() argument
229 if (PAGE_ALIGN(dmb->dmb_len) > dma_get_max_seg_size(&ism->pdev->dev)) in ism_alloc_dmb()
232 if (!dmb->sba_idx) { in ism_alloc_dmb()
238 dmb->sba_idx = bit; in ism_alloc_dmb()
240 if (dmb->sba_idx < ISM_DMB_BIT_OFFSET || in ism_alloc_dmb()
241 test_and_set_bit(dmb->sba_idx, ism->sba_bitmap)) in ism_alloc_dmb()
[all …]
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| D | ism.h | 116 u64 dmb; member
207 #define ISM_CREATE_REQ(dmb, idx, sf, offset) \ argument
208 ((dmb) | (idx) << 24 | (sf) << 23 | (offset))
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| /linux-5.19.10/arch/arm/include/asm/ |
| D | barrier.h | 21 #define dmb(option) __asm__ __volatile__ ("dmb " #option : : : "memory") macro
33 #define dmb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 5" \ macro
40 #define dmb(x) __asm__ __volatile__ ("" : : : "memory") macro
45 #define dmb(x) __asm__ __volatile__ ("" : : : "memory") macro
67 #define dma_rmb() dmb(osh)
68 #define dma_wmb() dmb(oshst)
77 #define __smp_mb() dmb(ish)
79 #define __smp_wmb() dmb(ishst)
|
| D | assembler.h | 388 ALT_SMP(dmb ish)
390 ALT_SMP(W(dmb) ish)
393 ALT_SMP(mcr p15, 0, r0, c7, c10, 5) @ dmb
|
| /linux-5.19.10/net/smc/ |
| D | smc_ism.c | 173 struct smcd_dmb dmb; in smc_ism_unregister_dmb() local
179 memset(&dmb, 0, sizeof(dmb)); in smc_ism_unregister_dmb()
180 dmb.dmb_tok = dmb_desc->token; in smc_ism_unregister_dmb()
181 dmb.sba_idx = dmb_desc->sba_idx; in smc_ism_unregister_dmb()
182 dmb.cpu_addr = dmb_desc->cpu_addr; in smc_ism_unregister_dmb()
183 dmb.dma_addr = dmb_desc->dma_addr; in smc_ism_unregister_dmb()
184 dmb.dmb_len = dmb_desc->len; in smc_ism_unregister_dmb()
185 rc = smcd->ops->unregister_dmb(smcd, &dmb); in smc_ism_unregister_dmb()
197 struct smcd_dmb dmb; in smc_ism_register_dmb() local
200 memset(&dmb, 0, sizeof(dmb)); in smc_ism_register_dmb()
[all …]
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| /linux-5.19.10/arch/arm64/include/asm/ |
| D | barrier.h | 26 #define dmb(opt) asm volatile("dmb " #opt : : : "memory") macro
57 #define dma_mb() dmb(osh)
58 #define dma_rmb() dmb(oshld)
59 #define dma_wmb() dmb(oshst)
116 #define __smp_mb() dmb(ish)
117 #define __smp_rmb() dmb(ishld)
118 #define __smp_wmb() dmb(ishst)
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| D | atomic_ll_sc.h | 102 ATOMIC_OP_RETURN( , dmb ish, , l, "memory", __VA_ARGS__)\
106 ATOMIC_FETCH_OP ( , dmb ish, , l, "memory", __VA_ARGS__)\
117 ATOMIC_FETCH_OP ( , dmb ish, , l, "memory", __VA_ARGS__)\ in ATOMIC_OPS()
201 ATOMIC64_OP_RETURN(, dmb ish, , l, "memory", __VA_ARGS__) \
205 ATOMIC64_FETCH_OP (, dmb ish, , l, "memory", __VA_ARGS__) \
216 ATOMIC64_FETCH_OP (, dmb ish, , l, "memory", __VA_ARGS__) \
311 __CMPXCHG_CASE(w, b, mb_, 8, dmb ish, , l, "memory", K)
312 __CMPXCHG_CASE(w, h, mb_, 16, dmb ish, , l, "memory", K)
313 __CMPXCHG_CASE(w, , mb_, 32, dmb ish, , l, "memory", K)
314 __CMPXCHG_CASE( , , mb_, 64, dmb ish, , l, "memory", L)
[all …]
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| D | cmpxchg.h | 57 __XCHG_CASE(w, b, mb_, 8, dmb ish, nop, , a, l, "memory")
58 __XCHG_CASE(w, h, mb_, 16, dmb ish, nop, , a, l, "memory")
59 __XCHG_CASE(w, , mb_, 32, dmb ish, nop, , a, l, "memory")
60 __XCHG_CASE( , , mb_, 64, dmb ish, nop, , a, l, "memory")
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| /linux-5.19.10/tools/virtio/asm/ |
| D | barrier.h | 20 #define dmb(opt) asm volatile("dmb " #opt : : : "memory") macro
22 #define virt_rmb() dmb(ishld)
23 #define virt_wmb() dmb(ishst)
24 #define virt_store_mb(var, value) do { WRITE_ONCE(var, value); dmb(ish); } while (0)
|
| /linux-5.19.10/arch/arm/common/ |
| D | vlock.S | 29 dmb
33 dmb
80 dmb
93 dmb
|
| D | mcpm_head.S | 121 dmb
136 dmb
148 dmb
152 dmb
173 dmb
182 dmb
196 dmb
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| D | mcpm_entry.c | 49 dmb(); in __mcpm_cpu_down()
65 dmb(); in __mcpm_outbound_leave_critical()
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| /linux-5.19.10/tools/testing/selftests/kvm/include/aarch64/ |
| D | processor.h | 135 #define dmb(opt) asm volatile("dmb " #opt : : : "memory") macro
137 #define dma_wmb() dmb(oshst)
140 #define dma_rmb() dmb(oshld)
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| /linux-5.19.10/include/net/ |
| D | smc.h | 57 int (*register_dmb)(struct smcd_dev *dev, struct smcd_dmb *dmb);
58 int (*unregister_dmb)(struct smcd_dev *dev, struct smcd_dmb *dmb);
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| /linux-5.19.10/arch/arm64/kernel/ |
| D | head.S | 118 dmb sy // needed before dc ivac with
306 dmb sy
328 dmb sy
381 dmb sy
572 dmb sy
685 dmb sy
|
| /linux-5.19.10/arch/arm/mm/ |
| D | cache-b15-rac.c | 66 dmb(); in __b15_rac_disable()
80 dmb(); in __b15_rac_flush()
|
| /linux-5.19.10/arch/arm/mach-omap2/ |
| D | sleep34xx.S | 97 dmb @ data memory barrier
213 dmb
418 dmb @ data memory barrier
429 dmb @ data memory barrier
444 dmb @ data memory barrier
|
| D | omap-smc.S | 52 dmb
|
| D | sleep33xx.S | 133 dmb
|
| /linux-5.19.10/arch/arm64/mm/ |
| D | flush.c | 106 dmb(osh); in arch_wb_cache_pmem()
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| D | proc.S | 207 dmb sy // lines are written back before
216 dmb sy // that it is visible to all
|
| /linux-5.19.10/arch/arm/mach-socfpga/ |
| D | self-refresh.S | 85 dmb
|
| /linux-5.19.10/arch/arm/mach-tegra/ |
| D | sleep.S | 35 dmb @ ensure ordering
|
| /linux-5.19.10/arch/arm/kernel/ |
| D | smp_tlb.c | 153 dmb(); in ipi_flush_tlb_a15_erratum()
|