Searched refs:dm_read_reg_soc15 (Results 1 – 4 of 4) sorted by relevance
| /linux-5.19.10/drivers/gpu/drm/amd/display/dc/dce120/ ! |
| D | dce120_timing_generator.c | 90 uint32_t value = dm_read_reg_soc15( in dce120_timing_generator_is_in_vertical_blank()
173 uint32_t value = dm_read_reg_soc15( in dce120_timing_generator_get_vblank_counter()
189 uint32_t value = dm_read_reg_soc15( in dce120_timing_generator_get_crtc_position()
200 value = dm_read_reg_soc15( in dce120_timing_generator_get_crtc_position()
251 dm_read_reg_soc15(tg->ctx, in dce120_timing_generator_setup_global_swap_lock()
312 uint32_t pol_value = dm_read_reg_soc15( in dce120_timing_generator_enable_reset_trigger()
374 uint32_t value = dm_read_reg_soc15( in dce120_timing_generator_did_triggered_reset_occur()
416 value = dm_read_reg_soc15(tg->ctx, mmD1VGA_CONTROL, offset); in dce120_timing_generator_disable_vga()
513 value = dm_read_reg_soc15( in dce120_timing_generator_set_overscan_color_black()
602 uint32_t v_blank_start_end = dm_read_reg_soc15( in dce120_timing_generator_get_crtc_scanoutpos()
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| D | dce120_resource.c | 668 uint32_t reg_val = dm_read_reg_soc15(ctx, mmCC_DC_MISC_STRAPS, 0); in read_dce_straps()
677 reg_val = dm_read_reg_soc15(ctx, mmDC_PINSTRAPS, 0); in read_dce_straps()
1045 uint32_t value = dm_read_reg_soc15(ctx, mmCC_DC_PIPE_DIS, 0); in read_pipe_fuses()
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| /linux-5.19.10/drivers/gpu/drm/amd/display/dc/ ! |
| D | dm_services.h | 153 #define dm_read_reg_soc15(ctx, reg, inst_offset) \ macro
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| /linux-5.19.10/drivers/gpu/drm/amd/display/dc/dcn10/ ! |
| D | dcn10_resource.c | 1293 uint32_t value = dm_read_reg_soc15(ctx, mmCC_DC_PIPE_DIS, 0); in read_pipe_fuses()
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