Home
last modified time | relevance | path

Searched refs:dcn2_1_soc (Results 1 – 3 of 3) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/display/dc/dml/dcn20/
Ddcn20_fpu.c510 struct _vcs_dpi_soc_bounding_box_st dcn2_1_soc = { variable
1961 low_pstate_lvl.dispclk_mhz = dcn2_1_soc.clock_limits[high_voltage_lvl].dispclk_mhz; in construct_low_pstate_lvl()
1962 low_pstate_lvl.dppclk_mhz = dcn2_1_soc.clock_limits[high_voltage_lvl].dppclk_mhz; in construct_low_pstate_lvl()
1963 …low_pstate_lvl.dram_bw_per_chan_gbps = dcn2_1_soc.clock_limits[high_voltage_lvl].dram_bw_per_chan_… in construct_low_pstate_lvl()
1964 low_pstate_lvl.dscclk_mhz = dcn2_1_soc.clock_limits[high_voltage_lvl].dscclk_mhz; in construct_low_pstate_lvl()
1965 low_pstate_lvl.dtbclk_mhz = dcn2_1_soc.clock_limits[high_voltage_lvl].dtbclk_mhz; in construct_low_pstate_lvl()
1966 low_pstate_lvl.phyclk_d18_mhz = dcn2_1_soc.clock_limits[high_voltage_lvl].phyclk_d18_mhz; in construct_low_pstate_lvl()
1967 low_pstate_lvl.phyclk_mhz = dcn2_1_soc.clock_limits[high_voltage_lvl].phyclk_mhz; in construct_low_pstate_lvl()
1989 dcn2_1_soc.num_chans = bw_params->num_channels; in dcn21_update_bw_bounding_box()
1993 for (i = 0; i < dcn2_1_soc.num_states + 1; i++) { in dcn21_update_bw_bounding_box()
[all …]
/linux-5.19.10/drivers/gpu/drm/amd/display/dc/dcn21/
Ddcn21_resource.h39 extern struct _vcs_dpi_soc_bounding_box_st dcn2_1_soc;
Ddcn21_resource.c1600 dml_init_instance(&dc->dml, &dcn2_1_soc, &dcn2_1_ip, DML_PROJECT_DCN21); in dcn21_resource_construct()