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Searched refs:dcfclk (Results 1 – 9 of 9) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/display/dc/dml/dcn30/
Ddcn30_fpu.c385 double dcfclk = context->bw_ctx.dml.vba.DCFCLKState[vlevel][maxMpcComb]; in dcn30_fpu_calculate_wm_and_dlg() local
390 if (context->bw_ctx.dml.soc.min_dcfclk > dcfclk) in dcn30_fpu_calculate_wm_and_dlg()
391 dcfclk = context->bw_ctx.dml.soc.min_dcfclk; in dcn30_fpu_calculate_wm_and_dlg()
394 pipes[0].clks_cfg.dcfclk_mhz = dcfclk; in dcn30_fpu_calculate_wm_and_dlg()
420 pipes[0].clks_cfg.dcfclk_mhz = dcfclk; in dcn30_fpu_calculate_wm_and_dlg()
/linux-5.19.10/drivers/gpu/drm/amd/display/dc/dml/dcn31/
Ddcn31_fpu.c444 double dcfclk = context->bw_ctx.dml.vba.DCFCLKState[vlevel][context->bw_ctx.dml.vba.maxMpcComb]; in dcn31_calculate_wm_and_dlg_fp() local
448 if (context->bw_ctx.dml.soc.min_dcfclk > dcfclk) in dcn31_calculate_wm_and_dlg_fp()
449 dcfclk = context->bw_ctx.dml.soc.min_dcfclk; in dcn31_calculate_wm_and_dlg_fp()
456 context->bw_ctx.bw.dcn.clk.dcfclk_khz = dcfclk; // always should be vlevel 0 in dcn31_calculate_wm_and_dlg_fp()
461 pipes[0].clks_cfg.dcfclk_mhz = dcfclk; in dcn31_calculate_wm_and_dlg_fp()
489 pipes[0].clks_cfg.dcfclk_mhz = dcfclk; in dcn31_calculate_wm_and_dlg_fp()
/linux-5.19.10/drivers/gpu/drm/amd/display/dc/inc/hw/
Dclk_mgr.h139 uint32_t dcfclk; member
/linux-5.19.10/drivers/gpu/drm/amd/display/dc/dml/calcs/
Ddcn_calc_auto.c1006 v->dcfclk = v->dcfclk_per_state[v->voltage_level]; in mode_support_and_system_configuration()
1226 …v->return_bandwidth_to_dcn =dcn_bw_min2(v->return_bus_width * v->dcfclk, v->fabric_and_dram_bandwi… in dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation()
1234 …if (v->dcc_enabled_any_plane == dcn_bw_yes && v->return_bandwidth_to_dcn > v->dcfclk * v->return_b… in dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation()
1235 …->pixel_chunk_size_in_kbyte) * 1024.0 / (v->return_bandwidth_to_dcn - v->dcfclk * v->return_bus_wi… in dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation()
1237 …v->critical_compression = 2.0 * v->return_bus_width * v->dcfclk * v->urgent_latency / (v->return_b… in dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation()
1239 …byte - v->pixel_chunk_size_in_kbyte) * 1024.0 * v->return_bus_width * v->dcfclk * v->urgent_latenc… in dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation()
1241 …v->return_bandwidth_to_dcn =dcn_bw_min2(v->return_bus_width * v->dcfclk, v->fabric_and_dram_bandwi… in dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation()
1242 …if (v->dcc_enabled_any_plane == dcn_bw_yes && v->return_bandwidth_to_dcn > v->dcfclk * v->return_b… in dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation()
1243 …->pixel_chunk_size_in_kbyte) * 1024.0 / (v->return_bandwidth_to_dcn - v->dcfclk * v->return_bus_wi… in dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation()
1245 …v->critical_compression = 2.0 * v->return_bus_width * v->dcfclk * v->urgent_latency / (v->return_b… in dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation()
[all …]
Ddcn_calcs.c494 input->clks_cfg.dcfclk_mhz = v->dcfclk; in dcn_bw_calc_rq_dlg_ttu()
577 v->dcfclk = v->dcfclkv_nom0p8;
598 v->dcfclk = v->dcfclkv_max0p9;
618 v->dcfclk = v->dcfclk_per_state[v->voltage_level];
1180 context->bw_ctx.bw.dcn.clk.dcfclk_khz = (int)(v->dcfclk * 1000); in dcn_validate_bandwidth()
/linux-5.19.10/drivers/gpu/drm/amd/display/dc/dml/
Ddml_wrapper.c1666 double dcfclk = context->bw_ctx.dml.soc.clock_limits[0].dcfclk_mhz; in dml_calculate_wm_and_dlg() local
1681 dcfclk = context->bw_ctx.dml.soc.clock_limits[2].dcfclk_mhz; in dml_calculate_wm_and_dlg()
1683 dcfclk = 615; //DCFCLK Vmin_lv in dml_calculate_wm_and_dlg()
1686 pipes[0].clks_cfg.dcfclk_mhz = dcfclk; in dml_calculate_wm_and_dlg()
1718 dcfclk = dc->clk_mgr->bw_params->clk_table.entries[0].dcfclk_mhz; in dml_calculate_wm_and_dlg()
1720 dcfclk = 615; //DCFCLK Vmin_lv in dml_calculate_wm_and_dlg()
1723 pipes[0].clks_cfg.dcfclk_mhz = dcfclk; in dml_calculate_wm_and_dlg()
/linux-5.19.10/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/
Dvg_clk_mgr.c246 regs_and_bypass->dcfclk = internal.CLK1_CLK3_CURRENT_CNT / 10; in vg_dump_clk_registers()
273 regs_and_bypass->dcfclk, in vg_dump_clk_registers()
/linux-5.19.10/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/
Drn_clk_mgr.c318 regs_and_bypass->dcfclk = internal.CLK1_CLK3_CURRENT_CNT / 10; in rn_dump_clk_registers()
345 regs_and_bypass->dcfclk, in rn_dump_clk_registers()
/linux-5.19.10/drivers/gpu/drm/amd/display/dc/inc/
Ddcn_calcs.h213 float dcfclk; member