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/linux-5.19.10/arch/riscv/kernel/
Dtraps_misaligned.c236 ulong data_ulong; member
316 SET_RD(insn, regs, val.data_ulong << shift >> shift); in handle_misaligned_load()
333 val.data_ulong = GET_RS2(insn, regs); in handle_misaligned_store()
346 val.data_ulong = GET_RS2S(insn, regs); in handle_misaligned_store()
350 val.data_ulong = GET_RS2C(insn, regs); in handle_misaligned_store()
354 val.data_ulong = GET_RS2S(insn, regs); in handle_misaligned_store()
358 val.data_ulong = GET_RS2C(insn, regs); in handle_misaligned_store()