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Searched refs:cr2 (Results 1 – 25 of 62) sorted by relevance

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/linux-5.19.10/drivers/i2c/busses/
Di2c-stm32f7.c194 u32 cr2; member
790 u32 cr2; in stm32f7_i2c_reload() local
795 cr2 = readl_relaxed(i2c_dev->base + STM32F7_I2C_CR2); in stm32f7_i2c_reload()
797 cr2 &= ~STM32F7_I2C_CR2_NBYTES_MASK; in stm32f7_i2c_reload()
799 cr2 |= STM32F7_I2C_CR2_NBYTES(STM32F7_I2C_MAX_LEN); in stm32f7_i2c_reload()
801 cr2 &= ~STM32F7_I2C_CR2_RELOAD; in stm32f7_i2c_reload()
802 cr2 |= STM32F7_I2C_CR2_NBYTES(f7_msg->count); in stm32f7_i2c_reload()
805 writel_relaxed(cr2, i2c_dev->base + STM32F7_I2C_CR2); in stm32f7_i2c_reload()
811 u32 cr2; in stm32f7_i2c_smbus_reload() local
825 cr2 = readl_relaxed(i2c_dev->base + STM32F7_I2C_CR2); in stm32f7_i2c_smbus_reload()
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Di2c-stm32f4.c154 u32 cr2 = 0; in stm32f4_i2c_set_periph_clk_freq() local
185 cr2 |= STM32F4_I2C_CR2_FREQ(freq); in stm32f4_i2c_set_periph_clk_freq()
186 writel_relaxed(cr2, i2c_dev->base + STM32F4_I2C_CR2); in stm32f4_i2c_set_periph_clk_freq()
561 u32 status, ien, event, cr2; in stm32f4_i2c_isr_event() local
563 cr2 = readl_relaxed(i2c_dev->base + STM32F4_I2C_CR2); in stm32f4_i2c_isr_event()
564 ien = cr2 & STM32F4_I2C_CR2_IRQ_MASK; in stm32f4_i2c_isr_event()
594 cr2 |= STM32F4_I2C_CR2_ITBUFEN; in stm32f4_i2c_isr_event()
595 writel_relaxed(cr2, i2c_dev->base + STM32F4_I2C_CR2); in stm32f4_i2c_isr_event()
/linux-5.19.10/arch/x86/um/shared/sysdep/
Dmcontext.h15 (fi).cr2 = (mc)->cr2; \
24 (fi).cr2 = (mc)->gregs[REG_CR2]; \
Dfaultinfo_32.h20 unsigned long cr2; /* in ptrace_faultinfo called addr */ member
25 #define FAULT_ADDRESS(fi) ((fi).cr2)
Dfaultinfo_64.h20 unsigned long cr2; /* in ptrace_faultinfo called addr */ member
25 #define FAULT_ADDRESS(fi) ((fi).cr2)
/linux-5.19.10/arch/x86/kernel/
Ddoublefault_32.c25 unsigned long cr2; in doublefault_shim() local
30 cr2 = native_read_cr2(); in doublefault_shim()
72 exc_double_fault(&regs, 0, cr2); in doublefault_shim()
Dprocess_32.c62 unsigned long cr0 = 0L, cr2 = 0L, cr3 = 0L, cr4 = 0L; in __show_regs() local
81 cr2 = read_cr2(); in __show_regs()
85 log_lvl, cr0, cr2, cr3, cr4); in __show_regs()
Dasm-offsets_64.c50 ENTRY(cr2); in main()
Dsev.c276 ctxt->fi.cr2 = ctxt->regs->ip; in __vc_decode_user_insn()
282 ctxt->fi.cr2 = 0; in __vc_decode_user_insn()
304 ctxt->fi.cr2 = ctxt->regs->ip; in __vc_decode_kern_insn()
397 ctxt->fi.cr2 = (unsigned long)dst; in vc_write_mem()
475 ctxt->fi.cr2 = (unsigned long)src; in vc_read_mem()
494 ctxt->fi.cr2 = vaddr; in vc_slow_virt_to_phys()
1416 native_write_cr2(ctxt->fi.cr2); in vc_early_forward_exception()
1832 write_cr2(ctxt->fi.cr2); in vc_forward_exception()
Dprocess_64.c69 unsigned long cr0 = 0L, cr2 = 0L, cr3 = 0L, cr4 = 0L, fs, gs, shadowgs; in __show_regs() local
113 cr2 = read_cr2(); in __show_regs()
122 log_lvl, cr2, cr3, cr4); in __show_regs()
/linux-5.19.10/arch/x86/include/uapi/asm/
Dsigcontext.h232 __u32 cr2; member
264 __u64 cr2; member
322 __u32 cr2; member
379 __u64 cr2; member
Dkvm.h156 __u64 cr0, cr2, cr3, cr4, cr8; member
167 __u64 cr0, cr2, cr3, cr4, cr8; member
/linux-5.19.10/drivers/tty/serial/
Dstm32-usart.h13 u8 cr2; member
49 .cr2 = 0x10,
66 .cr2 = 0x04,
88 .cr2 = 0x04,
Dfsl_lpuart.c1136 unsigned char cr2; in lpuart_copy_rx_to_tty() local
1139 cr2 = readb(sport->port.membase + UARTCR2); in lpuart_copy_rx_to_tty()
1140 cr2 &= ~UARTCR2_RE; in lpuart_copy_rx_to_tty()
1141 writeb(cr2, sport->port.membase + UARTCR2); in lpuart_copy_rx_to_tty()
1167 cr2 |= UARTCR2_RE; in lpuart_copy_rx_to_tty()
1168 writeb(cr2, sport->port.membase + UARTCR2); in lpuart_copy_rx_to_tty()
1506 unsigned char val, cr2; in lpuart_setup_watermark() local
1509 cr2 = readb(sport->port.membase + UARTCR2); in lpuart_setup_watermark()
1510 cr2_saved = cr2; in lpuart_setup_watermark()
1511 cr2 &= ~(UARTCR2_TIE | UARTCR2_TCIE | UARTCR2_TE | in lpuart_setup_watermark()
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/linux-5.19.10/drivers/iio/trigger/
Dstm32-timer-trigger.c81 u32 cr2; member
291 u32 cr2; in stm32_tt_show_master_mode() local
293 regmap_read(priv->regmap, TIM_CR2, &cr2); in stm32_tt_show_master_mode()
296 cr2 = (cr2 & TIM_CR2_MMS2) >> TIM_CR2_MMS2_SHIFT; in stm32_tt_show_master_mode()
298 cr2 = (cr2 & TIM_CR2_MMS) >> TIM_CR2_MMS_SHIFT; in stm32_tt_show_master_mode()
300 return sysfs_emit(buf, "%s\n", master_mode_table[cr2]); in stm32_tt_show_master_mode()
839 regmap_read(priv->regmap, TIM_CR2, &priv->bak.cr2); in stm32_timer_trigger_suspend()
865 regmap_write(priv->regmap, TIM_CR2, priv->bak.cr2); in stm32_timer_trigger_resume()
/linux-5.19.10/arch/powerpc/kernel/
Dcpu_setup_6xx.S190 cmpwi cr2,r10,11
192 cror 4*cr0+eq,4*cr0+eq,4*cr2+eq
335 cmplwi cr2,r3,0x800c /* 7410 */
342 cror 4*cr1+eq,4*cr1+eq,4*cr2+eq
406 cmplwi cr2,r3,0x800c /* 7410 */
413 cror 4*cr1+eq,4*cr1+eq,4*cr2+eq
432 bne cr2,1f
/linux-5.19.10/arch/s390/kernel/
Dnmi.c190 union ctlreg2 cr2; in s390_validate_registers() local
316 cr2.val = S390_lowcore.cregs_save_area[2]; in s390_validate_registers()
317 if (cr2.gse) { in s390_validate_registers()
Dsetup.c846 union ctlreg2 cr2; in setup_cr() local
855 __ctl_store(cr2.val, 2, 2); in setup_cr()
858 cr2.ducto = (unsigned long)__ctl_duct >> 6; in setup_cr()
861 __ctl_load(cr2.val, 2, 2); in setup_cr()
/linux-5.19.10/arch/powerpc/platforms/cell/
Dcbe_thermal.c302 u64 cr2; in init_default_values() local
335 cr2 = 0x04; in init_default_values()
357 out_be64(&pmd_regs->tm_cr2, cr2); in init_default_values()
/linux-5.19.10/arch/x86/include/asm/
Dsuspend_32.h20 unsigned long cr0, cr2, cr3, cr4; member
Dsuspend_64.h41 unsigned long cr0, cr2, cr3, cr4; member
/linux-5.19.10/arch/powerpc/boot/
Dppc_asm.h15 #define cr2 2 macro
/linux-5.19.10/arch/x86/include/asm/xen/
Dinterface_32.h76 unsigned long cr2; member
/linux-5.19.10/arch/x86/power/
Dcpu.c123 ctxt->cr2 = read_cr2(); in __save_processor_state()
213 write_cr2(ctxt->cr2); in __restore_processor_state()
/linux-5.19.10/tools/arch/x86/include/uapi/asm/
Dkvm.h156 __u64 cr0, cr2, cr3, cr4, cr8; member
167 __u64 cr0, cr2, cr3, cr4, cr8; member

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