Home
last modified time | relevance | path

Searched refs:clock_registers (Results 1 – 14 of 14) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/radeon/
Dni_dpm.c1183 ni_pi->clock_registers.cg_spll_func_cntl = RREG32(CG_SPLL_FUNC_CNTL); in ni_read_clock_registers()
1184 ni_pi->clock_registers.cg_spll_func_cntl_2 = RREG32(CG_SPLL_FUNC_CNTL_2); in ni_read_clock_registers()
1185 ni_pi->clock_registers.cg_spll_func_cntl_3 = RREG32(CG_SPLL_FUNC_CNTL_3); in ni_read_clock_registers()
1186 ni_pi->clock_registers.cg_spll_func_cntl_4 = RREG32(CG_SPLL_FUNC_CNTL_4); in ni_read_clock_registers()
1187 ni_pi->clock_registers.cg_spll_spread_spectrum = RREG32(CG_SPLL_SPREAD_SPECTRUM); in ni_read_clock_registers()
1188 ni_pi->clock_registers.cg_spll_spread_spectrum_2 = RREG32(CG_SPLL_SPREAD_SPECTRUM_2); in ni_read_clock_registers()
1189 ni_pi->clock_registers.mpll_ad_func_cntl = RREG32(MPLL_AD_FUNC_CNTL); in ni_read_clock_registers()
1190 ni_pi->clock_registers.mpll_ad_func_cntl_2 = RREG32(MPLL_AD_FUNC_CNTL_2); in ni_read_clock_registers()
1191 ni_pi->clock_registers.mpll_dq_func_cntl = RREG32(MPLL_DQ_FUNC_CNTL); in ni_read_clock_registers()
1192 ni_pi->clock_registers.mpll_dq_func_cntl_2 = RREG32(MPLL_DQ_FUNC_CNTL_2); in ni_read_clock_registers()
[all …]
Dsi_dpm.c3552 si_pi->clock_registers.cg_spll_func_cntl = RREG32(CG_SPLL_FUNC_CNTL); in si_read_clock_registers()
3553 si_pi->clock_registers.cg_spll_func_cntl_2 = RREG32(CG_SPLL_FUNC_CNTL_2); in si_read_clock_registers()
3554 si_pi->clock_registers.cg_spll_func_cntl_3 = RREG32(CG_SPLL_FUNC_CNTL_3); in si_read_clock_registers()
3555 si_pi->clock_registers.cg_spll_func_cntl_4 = RREG32(CG_SPLL_FUNC_CNTL_4); in si_read_clock_registers()
3556 si_pi->clock_registers.cg_spll_spread_spectrum = RREG32(CG_SPLL_SPREAD_SPECTRUM); in si_read_clock_registers()
3557 si_pi->clock_registers.cg_spll_spread_spectrum_2 = RREG32(CG_SPLL_SPREAD_SPECTRUM_2); in si_read_clock_registers()
3558 si_pi->clock_registers.dll_cntl = RREG32(DLL_CNTL); in si_read_clock_registers()
3559 si_pi->clock_registers.mclk_pwrmgt_cntl = RREG32(MCLK_PWRMGT_CNTL); in si_read_clock_registers()
3560 si_pi->clock_registers.mpll_ad_func_cntl = RREG32(MPLL_AD_FUNC_CNTL); in si_read_clock_registers()
3561 si_pi->clock_registers.mpll_dq_func_cntl = RREG32(MPLL_DQ_FUNC_CNTL); in si_read_clock_registers()
[all …]
Dci_dpm.c1837 pi->clock_registers.cg_spll_func_cntl = in ci_read_clock_registers()
1839 pi->clock_registers.cg_spll_func_cntl_2 = in ci_read_clock_registers()
1841 pi->clock_registers.cg_spll_func_cntl_3 = in ci_read_clock_registers()
1843 pi->clock_registers.cg_spll_func_cntl_4 = in ci_read_clock_registers()
1845 pi->clock_registers.cg_spll_spread_spectrum = in ci_read_clock_registers()
1847 pi->clock_registers.cg_spll_spread_spectrum_2 = in ci_read_clock_registers()
1849 pi->clock_registers.dll_cntl = RREG32(DLL_CNTL); in ci_read_clock_registers()
1850 pi->clock_registers.mclk_pwrmgt_cntl = RREG32(MCLK_PWRMGT_CNTL); in ci_read_clock_registers()
1851 pi->clock_registers.mpll_ad_func_cntl = RREG32(MPLL_AD_FUNC_CNTL); in ci_read_clock_registers()
1852 pi->clock_registers.mpll_dq_func_cntl = RREG32(MPLL_DQ_FUNC_CNTL); in ci_read_clock_registers()
[all …]
Dsi_dpm.h154 struct si_clock_registers clock_registers; member
Dni_dpm.h181 struct ni_clock_registers clock_registers; member
Dci_dpm.h200 struct ci_clock_registers clock_registers; member
/linux-5.19.10/drivers/gpu/drm/amd/pm/powerplay/smumgr/
Diceland_smumgr.c800 uint32_t spll_func_cntl = data->clock_registers.vCG_SPLL_FUNC_CNTL; in iceland_calculate_sclk_params()
801 uint32_t spll_func_cntl_3 = data->clock_registers.vCG_SPLL_FUNC_CNTL_3; in iceland_calculate_sclk_params()
802 uint32_t spll_func_cntl_4 = data->clock_registers.vCG_SPLL_FUNC_CNTL_4; in iceland_calculate_sclk_params()
803 uint32_t cg_spll_spread_spectrum = data->clock_registers.vCG_SPLL_SPREAD_SPECTRUM; in iceland_calculate_sclk_params()
804 uint32_t cg_spll_spread_spectrum_2 = data->clock_registers.vCG_SPLL_SPREAD_SPECTRUM_2; in iceland_calculate_sclk_params()
1054 uint32_t dll_cntl = data->clock_registers.vDLL_CNTL; in iceland_calculate_mclk_params()
1055 uint32_t mclk_pwrmgt_cntl = data->clock_registers.vMCLK_PWRMGT_CNTL; in iceland_calculate_mclk_params()
1056 uint32_t mpll_ad_func_cntl = data->clock_registers.vMPLL_AD_FUNC_CNTL; in iceland_calculate_mclk_params()
1057 uint32_t mpll_dq_func_cntl = data->clock_registers.vMPLL_DQ_FUNC_CNTL; in iceland_calculate_mclk_params()
1058 uint32_t mpll_func_cntl = data->clock_registers.vMPLL_FUNC_CNTL; in iceland_calculate_mclk_params()
[all …]
Dci_smumgr.c303 uint32_t spll_func_cntl = data->clock_registers.vCG_SPLL_FUNC_CNTL; in ci_calculate_sclk_params()
304 uint32_t spll_func_cntl_3 = data->clock_registers.vCG_SPLL_FUNC_CNTL_3; in ci_calculate_sclk_params()
305 uint32_t spll_func_cntl_4 = data->clock_registers.vCG_SPLL_FUNC_CNTL_4; in ci_calculate_sclk_params()
306 uint32_t cg_spll_spread_spectrum = data->clock_registers.vCG_SPLL_SPREAD_SPECTRUM; in ci_calculate_sclk_params()
307 uint32_t cg_spll_spread_spectrum_2 = data->clock_registers.vCG_SPLL_SPREAD_SPECTRUM_2; in ci_calculate_sclk_params()
1033 uint32_t dll_cntl = data->clock_registers.vDLL_CNTL; in ci_calculate_mclk_params()
1034 uint32_t mclk_pwrmgt_cntl = data->clock_registers.vMCLK_PWRMGT_CNTL; in ci_calculate_mclk_params()
1035 uint32_t mpll_ad_func_cntl = data->clock_registers.vMPLL_AD_FUNC_CNTL; in ci_calculate_mclk_params()
1036 uint32_t mpll_dq_func_cntl = data->clock_registers.vMPLL_DQ_FUNC_CNTL; in ci_calculate_mclk_params()
1037 uint32_t mpll_func_cntl = data->clock_registers.vMPLL_FUNC_CNTL; in ci_calculate_mclk_params()
[all …]
Dtonga_smumgr.c543 uint32_t spll_func_cntl = data->clock_registers.vCG_SPLL_FUNC_CNTL; in tonga_calculate_sclk_params()
544 uint32_t spll_func_cntl_3 = data->clock_registers.vCG_SPLL_FUNC_CNTL_3; in tonga_calculate_sclk_params()
545 uint32_t spll_func_cntl_4 = data->clock_registers.vCG_SPLL_FUNC_CNTL_4; in tonga_calculate_sclk_params()
546 uint32_t cg_spll_spread_spectrum = data->clock_registers.vCG_SPLL_SPREAD_SPECTRUM; in tonga_calculate_sclk_params()
547 uint32_t cg_spll_spread_spectrum_2 = data->clock_registers.vCG_SPLL_SPREAD_SPECTRUM_2; in tonga_calculate_sclk_params()
797 uint32_t dll_cntl = data->clock_registers.vDLL_CNTL; in tonga_calculate_mclk_params()
798 uint32_t mclk_pwrmgt_cntl = data->clock_registers.vMCLK_PWRMGT_CNTL; in tonga_calculate_mclk_params()
799 uint32_t mpll_ad_func_cntl = data->clock_registers.vMPLL_AD_FUNC_CNTL; in tonga_calculate_mclk_params()
800 uint32_t mpll_dq_func_cntl = data->clock_registers.vMPLL_DQ_FUNC_CNTL; in tonga_calculate_mclk_params()
801 uint32_t mpll_func_cntl = data->clock_registers.vMPLL_FUNC_CNTL; in tonga_calculate_mclk_params()
[all …]
Dfiji_smumgr.c860 uint32_t spll_func_cntl = data->clock_registers.vCG_SPLL_FUNC_CNTL; in fiji_calculate_sclk_params()
861 uint32_t spll_func_cntl_3 = data->clock_registers.vCG_SPLL_FUNC_CNTL_3; in fiji_calculate_sclk_params()
862 uint32_t spll_func_cntl_4 = data->clock_registers.vCG_SPLL_FUNC_CNTL_4; in fiji_calculate_sclk_params()
863 uint32_t cg_spll_spread_spectrum = data->clock_registers.vCG_SPLL_SPREAD_SPECTRUM; in fiji_calculate_sclk_params()
864 uint32_t cg_spll_spread_spectrum_2 = data->clock_registers.vCG_SPLL_SPREAD_SPECTRUM_2; in fiji_calculate_sclk_params()
1307 uint32_t spll_func_cntl = data->clock_registers.vCG_SPLL_FUNC_CNTL; in fiji_populate_smc_acpi_level()
1308 uint32_t spll_func_cntl_2 = data->clock_registers.vCG_SPLL_FUNC_CNTL_2; in fiji_populate_smc_acpi_level()
1352 table->ACPILevel.CgSpllFuncCntl3 = data->clock_registers.vCG_SPLL_FUNC_CNTL_3; in fiji_populate_smc_acpi_level()
1353 table->ACPILevel.CgSpllFuncCntl4 = data->clock_registers.vCG_SPLL_FUNC_CNTL_4; in fiji_populate_smc_acpi_level()
1354 table->ACPILevel.SpllSpreadSpectrum = data->clock_registers.vCG_SPLL_SPREAD_SPECTRUM; in fiji_populate_smc_acpi_level()
[all …]
/linux-5.19.10/drivers/gpu/drm/amd/pm/legacy-dpm/
Dsi_dpm.c4026 si_pi->clock_registers.cg_spll_func_cntl = RREG32(CG_SPLL_FUNC_CNTL); in si_read_clock_registers()
4027 si_pi->clock_registers.cg_spll_func_cntl_2 = RREG32(CG_SPLL_FUNC_CNTL_2); in si_read_clock_registers()
4028 si_pi->clock_registers.cg_spll_func_cntl_3 = RREG32(CG_SPLL_FUNC_CNTL_3); in si_read_clock_registers()
4029 si_pi->clock_registers.cg_spll_func_cntl_4 = RREG32(CG_SPLL_FUNC_CNTL_4); in si_read_clock_registers()
4030 si_pi->clock_registers.cg_spll_spread_spectrum = RREG32(CG_SPLL_SPREAD_SPECTRUM); in si_read_clock_registers()
4031 si_pi->clock_registers.cg_spll_spread_spectrum_2 = RREG32(CG_SPLL_SPREAD_SPECTRUM_2); in si_read_clock_registers()
4032 si_pi->clock_registers.dll_cntl = RREG32(DLL_CNTL); in si_read_clock_registers()
4033 si_pi->clock_registers.mclk_pwrmgt_cntl = RREG32(MCLK_PWRMGT_CNTL); in si_read_clock_registers()
4034 si_pi->clock_registers.mpll_ad_func_cntl = RREG32(MPLL_AD_FUNC_CNTL); in si_read_clock_registers()
4035 si_pi->clock_registers.mpll_dq_func_cntl = RREG32(MPLL_DQ_FUNC_CNTL); in si_read_clock_registers()
[all …]
Dsi_dpm.h828 struct ni_clock_registers clock_registers; member
968 struct si_clock_registers clock_registers; member
/linux-5.19.10/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dsmu7_hwmgr.h227 struct smu7_clock_registers clock_registers; member
Dsmu7_hwmgr.c4733 data->clock_registers.vCG_SPLL_FUNC_CNTL = in smu7_read_clock_registers()
4735 data->clock_registers.vCG_SPLL_FUNC_CNTL_2 = in smu7_read_clock_registers()
4737 data->clock_registers.vCG_SPLL_FUNC_CNTL_3 = in smu7_read_clock_registers()
4739 data->clock_registers.vCG_SPLL_FUNC_CNTL_4 = in smu7_read_clock_registers()
4741 data->clock_registers.vCG_SPLL_SPREAD_SPECTRUM = in smu7_read_clock_registers()
4743 data->clock_registers.vCG_SPLL_SPREAD_SPECTRUM_2 = in smu7_read_clock_registers()
4745 data->clock_registers.vDLL_CNTL = in smu7_read_clock_registers()
4747 data->clock_registers.vMCLK_PWRMGT_CNTL = in smu7_read_clock_registers()
4749 data->clock_registers.vMPLL_AD_FUNC_CNTL = in smu7_read_clock_registers()
4751 data->clock_registers.vMPLL_DQ_FUNC_CNTL = in smu7_read_clock_registers()
[all …]