Home
last modified time | relevance | path

Searched refs:clk_sel (Results 1 – 25 of 29) sorted by relevance

12

/linux-5.19.10/drivers/gpu/drm/imx/
Dimx-ldb.c99 struct clk *clk_sel[4]; /* parent of display clock */ member
185 ret = clk_set_parent(ldb->clk_sel[mux], ldb->clk[chno]); in imx_ldb_set_clock()
199 if (mux < 0 || mux >= ARRAY_SIZE(ldb->clk_sel)) { in imx_ldb_encoder_enable()
207 clk_set_parent(ldb->clk_sel[mux], ldb->clk[0]); in imx_ldb_encoder_enable()
208 clk_set_parent(ldb->clk_sel[mux], ldb->clk[1]); in imx_ldb_encoder_enable()
213 clk_set_parent(ldb->clk_sel[mux], ldb->clk[imx_ldb_ch->chno]); in imx_ldb_encoder_enable()
262 if (mux < 0 || mux >= ARRAY_SIZE(ldb->clk_sel)) { in imx_ldb_encoder_atomic_mode_set()
352 ret = clk_set_parent(ldb->clk_sel[mux], ldb->clk_parent[mux]); in imx_ldb_encoder_disable()
658 imx_ldb->clk_sel[i] = devm_clk_get(imx_ldb->dev, clkname); in imx_ldb_probe()
659 if (IS_ERR(imx_ldb->clk_sel[i])) { in imx_ldb_probe()
[all …]
/linux-5.19.10/arch/mips/include/asm/octeon/
Dcvmx-gpio-defs.h53 uint64_t clk_sel:2; member
67 uint64_t clk_sel:2;
97 uint64_t clk_sel:2; member
111 uint64_t clk_sel:2;
360 uint64_t clk_sel:2; member
374 uint64_t clk_sel:2;
/linux-5.19.10/drivers/mmc/host/
Dtmio_mmc.c55 int clk_sel; in tmio_mmc_set_clock() local
65 clk_sel = (divisor <= 1); in tmio_mmc_set_clock()
66 clk = clk_sel ? 0 : (roundup_pow_of_two(divisor) >> 2); in tmio_mmc_set_clock()
68 host->pdata->set_clk_div(host->pdev, clk_sel); in tmio_mmc_set_clock()
/linux-5.19.10/drivers/net/ethernet/atheros/atl1c/
Datl1c_hw.c274 void atl1c_start_phy_polling(struct atl1c_hw *hw, u16 clk_sel) in atl1c_start_phy_polling() argument
282 FIELDX(MDIO_CTRL_CLK_SEL, clk_sel) | in atl1c_start_phy_polling()
306 u16 clk_sel = MDIO_CTRL_CLK_25_4; in atl1c_read_phy_core() local
315 clk_sel = MDIO_CTRL_CLK_25_128; in atl1c_read_phy_core()
320 FIELDX(MDIO_CTRL_CLK_SEL, clk_sel) | in atl1c_read_phy_core()
326 FIELDX(MDIO_CTRL_CLK_SEL, clk_sel) | in atl1c_read_phy_core()
339 atl1c_start_phy_polling(hw, clk_sel); in atl1c_read_phy_core()
355 u16 clk_sel = MDIO_CTRL_CLK_25_4; in atl1c_write_phy_core() local
363 clk_sel = MDIO_CTRL_CLK_25_128; in atl1c_write_phy_core()
369 FIELDX(MDIO_CTRL_CLK_SEL, clk_sel) | in atl1c_write_phy_core()
[all …]
/linux-5.19.10/arch/arm/mach-s3c/
Dmach-rx3715.c66 .clk_sel = S3C2410_UCON_CLKSEL3,
74 .clk_sel = S3C2410_UCON_CLKSEL3,
83 .clk_sel = S3C2410_UCON_CLKSEL3,
Dmach-osiris.c99 .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
107 .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
115 .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
Dmach-at2440evb.c62 .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
70 .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
Dmach-anubis.c93 .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
101 .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
Dmach-rx1950.c74 .clk_sel = S3C2410_UCON_CLKSEL3,
82 .clk_sel = S3C2410_UCON_CLKSEL3,
91 .clk_sel = S3C2410_UCON_CLKSEL3,
/linux-5.19.10/drivers/leds/rgb/
Dleds-qcom-lpg.c138 unsigned int clk_sel; member
260 unsigned int clk_sel, best_clk = 0; in lpg_calc_freq() local
298 for (clk_sel = 1; clk_sel < ARRAY_SIZE(lpg_clk_rates); clk_sel++) { in lpg_calc_freq()
299 u64 numerator = period * lpg_clk_rates[clk_sel]; in lpg_calc_freq()
314 actual = DIV_ROUND_UP_ULL(denominator * (1 << m), lpg_clk_rates[clk_sel]); in lpg_calc_freq()
322 best_clk = clk_sel; in lpg_calc_freq()
328 chan->clk_sel = best_clk; in lpg_calc_freq()
341 val = div64_u64(duty * lpg_clk_rates[chan->clk_sel], in lpg_calc_duty()
355 val = chan->clk_sel; in lpg_apply_freq()
/linux-5.19.10/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_dccg.c83 uint32_t clk_sel = 0; in dccg2_get_dccg_ref_freq() local
85 REG_GET_2(REFCLK_CNTL, REFCLK_CLOCK_EN, &clk_en, REFCLK_SRC_SEL, &clk_sel); in dccg2_get_dccg_ref_freq()
/linux-5.19.10/drivers/iio/adc/
Dvf610_adc.c103 enum clk_sel { enum
141 enum clk_sel clk_sel; member
235 adc_feature->clk_sel = VF610_ADCIOC_BUSCLK_SET; in vf610_adc_cfg_init()
255 switch (adc_feature->clk_sel) { in vf610_adc_cfg_post_set()
376 switch (adc_feature->clk_sel) { in vf610_adc_sample_set()
Dstm32-adc-core.c71 int (*clk_sel)(struct platform_device *, struct stm32_adc_priv *); member
721 ret = priv->cfg->clk_sel(pdev, priv); in stm32_adc_probe()
794 .clk_sel = stm32f4_adc_clk_sel,
802 .clk_sel = stm32h7_adc_clk_sel,
811 .clk_sel = stm32h7_adc_clk_sel,
/linux-5.19.10/drivers/net/ethernet/atheros/alx/
Dhw.c64 u32 val, clk_sel; in alx_read_phy_core() local
70 clk_sel = hw->link_speed != SPEED_UNKNOWN ? in alx_read_phy_core()
81 clk_sel << ALX_MDIO_CLK_SEL_SHIFT; in alx_read_phy_core()
84 clk_sel << ALX_MDIO_CLK_SEL_SHIFT | in alx_read_phy_core()
101 u32 val, clk_sel; in alx_write_phy_core() local
104 clk_sel = hw->link_speed != SPEED_UNKNOWN ? in alx_write_phy_core()
114 clk_sel << ALX_MDIO_CLK_SEL_SHIFT | in alx_write_phy_core()
119 clk_sel << ALX_MDIO_CLK_SEL_SHIFT | in alx_write_phy_core()
/linux-5.19.10/drivers/tty/serial/
Dsamsung_tty.c1416 unsigned int clk_sel) in s3c24xx_serial_setsource() argument
1425 if ((ucon & info->clksel_mask) >> info->clksel_shift == clk_sel) in s3c24xx_serial_setsource()
1429 ucon |= clk_sel << info->clksel_shift; in s3c24xx_serial_setsource()
1446 if (ourport->cfg->clk_sel && in s3c24xx_serial_getclk()
1447 !(ourport->cfg->clk_sel & (1 << cnt))) in s3c24xx_serial_getclk()
1525 unsigned int baud, quot, clk_sel = 0; in s3c24xx_serial_set_termios() local
1541 quot = s3c24xx_serial_getclk(ourport, baud, &clk, &clk_sel); in s3c24xx_serial_set_termios()
1552 s3c24xx_serial_setsource(port, clk_sel); in s3c24xx_serial_set_termios()
1980 unsigned int clk_sel; in s3c24xx_serial_enable_baudclk() local
1985 clk_sel = ourport->cfg->clk_sel ? : info->def_clk_sel; in s3c24xx_serial_enable_baudclk()
[all …]
/linux-5.19.10/sound/soc/sti/
Duniperif_player.c957 if (player->clk_sel) { in uni_player_resume()
958 ret = regmap_field_write(player->clk_sel, 1); in uni_player_resume()
1031 player->clk_sel = regmap_field_alloc(regmap, regfield[0]); in uni_player_parse_dt_audio_glue()
1082 if (player->clk_sel) { in uni_player_init()
1083 ret = regmap_field_write(player->clk_sel, 1); in uni_player_init()
/linux-5.19.10/drivers/video/fbdev/
Dgrvga.c43 int clk_sel; member
113 par->clk_sel = i; in grvga_check_var()
181 __raw_writel((par->clk_sel << 6) | (func << 4) | 1, in grvga_set_par()
/linux-5.19.10/drivers/clk/imx/
Dclk-imx93.c18 enum clk_sel { enum
47 enum clk_sel sel;
/linux-5.19.10/drivers/clk/ralink/
Dclk-mt7621.c255 u32 clkcfg, clk_sel, curclk, ffiv, ffrac; in mt7621_cpu_recalc_rate() local
260 clk_sel = FIELD_GET(CPU_CLK_SEL_MASK, clkcfg); in mt7621_cpu_recalc_rate()
266 switch (clk_sel) { in mt7621_cpu_recalc_rate()
/linux-5.19.10/drivers/spi/
Dspi-sunplus-sp7021.c287 u32 clk_rate, clk_sel, div; in sp7021_spi_setup_clk() local
292 clk_sel = (div / 2) - 1; in sp7021_spi_setup_clk()
294 pspim->xfer_conf |= FIELD_PREP(SP7021_CLK_MASK, clk_sel); in sp7021_spi_setup_clk()
Dspi-geni-qcom.c295 u32 clk_sel, m_clk_cfg, idx, div; in geni_spi_set_clock_and_bw() local
317 clk_sel = idx & CLK_SEL_MSK; in geni_spi_set_clock_and_bw()
319 writel(clk_sel, se->base + SE_GENI_CLK_SEL); in geni_spi_set_clock_and_bw()
/linux-5.19.10/include/linux/
Dserial_s3c.h284 unsigned int clk_sel; member
/linux-5.19.10/drivers/clk/mvebu/
Darmada-37xx-periph.c68 u32 clk_sel; member
703 data->clk_sel = readl(data->reg + CLK_SEL); in armada_3700_periph_clock_suspend()
719 writel(data->clk_sel, data->reg + CLK_SEL); in armada_3700_periph_clock_resume()
/linux-5.19.10/sound/soc/intel/atom/sst/
Dsst.h120 u64 clk_sel:3; member
/linux-5.19.10/drivers/media/dvb-frontends/
Dstv0900_core.c287 u32 m_div, clk_sel; in stv0900_set_mclk() local
298 clk_sel = ((stv0900_get_bits(intp, F0900_SELX1RATIO) == 1) ? 4 : 6); in stv0900_set_mclk()
299 m_div = ((clk_sel * mclk) / intp->quartz) - 1; in stv0900_set_mclk()

12