Searched refs:cgr_val (Results 1 – 2 of 2) sorted by relevance
| /linux-5.19.10/drivers/clk/imx/ |
| D | clk-gate2.c | 32 u8 cgr_val; member
49 reg |= (gate->cgr_val & gate->cgr_mask) << gate->bit_idx; in clk_gate2_do_shared_clks()
90 u8 cgr_val, u8 cgr_mask) in clk_gate2_reg_is_enabled() argument
94 if (((val >> bit_idx) & cgr_mask) == cgr_val) in clk_gate2_reg_is_enabled()
109 gate->cgr_val, gate->cgr_mask); in clk_gate2_is_enabled()
138 void __iomem *reg, u8 bit_idx, u8 cgr_val, u8 cgr_mask, in clk_hw_register_gate2() argument
154 gate->cgr_val = cgr_val; in clk_hw_register_gate2()
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| D | clk.h | 101 cgr_val, cgr_mask, clk_gate_flags, lock, share_count) \ argument
103 cgr_val, cgr_mask, clk_gate_flags, lock, share_count))
135 #define imx_clk_gate2_cgr(name, parent, reg, shift, cgr_val) \ argument
136 to_clk(__imx_clk_hw_gate2(name, parent, reg, shift, cgr_val, 0, NULL))
281 void __iomem *reg, u8 bit_idx, u8 cgr_val, u8 cgr_mask,
369 void __iomem *reg, u8 shift, u8 cgr_val, in __imx_clk_hw_gate2() argument
374 shift, cgr_val, 0x3, 0, &imx_ccm_lock, share_count); in __imx_clk_hw_gate2()
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