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Searched refs:cfg_addr (Results 1 – 25 of 27) sorted by relevance

12

/linux-5.19.10/arch/microblaze/pci/
Dindirect_pci.c46 out_be32(hose->cfg_addr, (0x80000000 | (bus_no << 16) | in indirect_read_config()
49 out_le32(hose->cfg_addr, (0x80000000 | (bus_no << 16) | in indirect_read_config()
100 out_be32(hose->cfg_addr, (0x80000000 | (bus_no << 16) | in indirect_write_config()
103 out_le32(hose->cfg_addr, (0x80000000 | (bus_no << 16) | in indirect_write_config()
145 resource_size_t cfg_addr, in setup_indirect_pci() argument
148 resource_size_t base = cfg_addr & PAGE_MASK; in setup_indirect_pci()
152 hose->cfg_addr = mbase + (cfg_addr & ~PAGE_MASK); in setup_indirect_pci()
/linux-5.19.10/arch/powerpc/sysdev/
Dtsi108_pci.c52 volatile unsigned char *cfg_addr; in tsi108_direct_write_config() local
59 cfg_addr = (unsigned char *)(tsi_mk_config_addr(bus->number, in tsi108_direct_write_config()
66 printk("%d ADDR=0x%08x ", len, (uint) cfg_addr); in tsi108_direct_write_config()
72 out_8((u8 *) cfg_addr, val); in tsi108_direct_write_config()
75 out_le16((u16 *) cfg_addr, val); in tsi108_direct_write_config()
78 out_le32((u32 *) cfg_addr, val); in tsi108_direct_write_config()
136 volatile unsigned char *cfg_addr; in tsi108_direct_read_config() local
144 cfg_addr = (unsigned char *)(tsi_mk_config_addr(bus->number, in tsi108_direct_read_config()
151 __tsi108_read_pci_config(temp, cfg_addr, "lbzx"); in tsi108_direct_read_config()
154 __tsi108_read_pci_config(temp, cfg_addr, "lhbrx"); in tsi108_direct_read_config()
[all …]
Dindirect_pci.c50 out_be32(hose->cfg_addr, (0x80000000 | (bus_no << 16) | in __indirect_read_config()
53 out_le32(hose->cfg_addr, (0x80000000 | (bus_no << 16) | in __indirect_read_config()
116 out_be32(hose->cfg_addr, (0x80000000 | (bus_no << 16) | in indirect_write_config()
119 out_le32(hose->cfg_addr, (0x80000000 | (bus_no << 16) | in indirect_write_config()
159 void setup_indirect_pci(struct pci_controller *hose, resource_size_t cfg_addr, in setup_indirect_pci() argument
162 resource_size_t base = cfg_addr & PAGE_MASK; in setup_indirect_pci()
166 hose->cfg_addr = mbase + (cfg_addr & ~PAGE_MASK); in setup_indirect_pci()
Dgrackle.c30 out_be32(bp->cfg_addr, GRACKLE_CFA(0, 0, 0xa8)); in grackle_set_stg()
34 out_be32(bp->cfg_addr, GRACKLE_CFA(0, 0, 0xa8)); in grackle_set_stg()
43 out_be32(bp->cfg_addr, GRACKLE_CFA(0, 0, 0xa8)); in grackle_set_loop_snoop()
47 out_be32(bp->cfg_addr, GRACKLE_CFA(0, 0, 0xa8)); in grackle_set_loop_snoop()
Dfsl_pci.c634 hose, hose->cfg_addr, hose->cfg_data); in fsl_add_bridge()
652 ((unsigned long)hose->cfg_addr & PAGE_MASK)) in fsl_add_bridge()
654 iounmap(hose->cfg_addr); in fsl_add_bridge()
883 hose, hose->cfg_addr, hose->cfg_data); in mpc83xx_add_bridge()
/linux-5.19.10/arch/powerpc/platforms/amigaone/
Dsetup.c35 const u32 *cfg_addr, *cfg_data; in amigaone_add_bridge() local
42 cfg_addr = of_get_address(dev, 0, NULL, NULL); in amigaone_add_bridge()
44 if ((cfg_addr == NULL) || (cfg_data == NULL)) in amigaone_add_bridge()
59 setup_indirect_pci(hose, cfg_addr[0], cfg_data[0], 0); in amigaone_add_bridge()
/linux-5.19.10/arch/powerpc/platforms/powermac/
Dpci.c155 out_le32(hose->cfg_addr, caddr); in macrisc_cfg_map_bus()
156 } while (in_le32(hose->cfg_addr) != caddr); in macrisc_cfg_map_bus()
209 hose->cfg_addr = ioremap(addr->start + 0x800000, 0x1000); in setup_chaos()
278 return ((void __iomem *)hose->cfg_addr) + (offset << 2); in u3_ht_cfg_access()
417 out_le32(hose->cfg_addr, caddr); in u4_pcie_cfg_map_bus()
418 } while (in_le32(hose->cfg_addr) != caddr); in u4_pcie_cfg_map_bus()
458 out_le32(bp->cfg_addr, (1UL << BANDIT_DEVNUM) + PCI_VENDOR_ID); in init_bandit()
464 out_le32(bp->cfg_addr, in init_bandit()
477 out_le32(bp->cfg_addr, (1UL << BANDIT_DEVNUM) + BANDIT_MAGIC); in init_bandit()
606 hose->cfg_addr = ioremap(addr->start + 0x800000, 0x1000); in setup_bandit()
[all …]
/linux-5.19.10/drivers/regulator/
Dmax77620-regulator.c64 u8 cfg_addr; member
218 addr = rinfo->cfg_addr; in max77620_regulator_set_power_mode()
247 addr = rinfo->cfg_addr; in max77620_regulator_get_power_mode()
271 ret = regmap_read(pmic->rmap, rinfo->cfg_addr, &rval); in max77620_read_slew_rate()
274 rinfo->cfg_addr, ret); in max77620_read_slew_rate()
341 ret = regmap_update_bits(pmic->rmap, rinfo->cfg_addr, mask, val); in max77620_set_slew_rate()
369 ret = regmap_update_bits(pmic->rmap, rinfo->cfg_addr, in max77620_config_power_ok()
373 rinfo->cfg_addr, ret); in max77620_config_power_ok()
521 ret = regmap_update_bits(pmic->rmap, rinfo->cfg_addr, in max77620_regulator_set_mode()
525 rinfo->cfg_addr, ret); in max77620_regulator_set_mode()
[all …]
/linux-5.19.10/arch/powerpc/platforms/maple/
Dpci.c110 out_le32(hose->cfg_addr, caddr); in u3_agp_cfg_access()
111 } while (in_le32(hose->cfg_addr) != caddr); in u3_agp_cfg_access()
211 addr = hose->cfg_addr; in u3_ht_root_read_config()
234 addr = hose->cfg_addr + ((offset & ~3) << 2) + (4 - len - (offset & 3)); in u3_ht_root_write_config()
364 out_le32(hose->cfg_addr, caddr); in u4_pcie_cfg_access()
365 } while (in_le32(hose->cfg_addr) != caddr); in u4_pcie_cfg_access()
454 hose->cfg_addr = ioremap(0xf0000000 + 0x800000, 0x1000); in setup_u3_agp()
466 hose->cfg_addr = ioremap(0xf0000000 + 0x800000, 0x1000); in setup_u4_pcie()
481 hose->cfg_addr = ioremap(0xf8070000, 0x1000); in setup_u3_ht()
/linux-5.19.10/drivers/ata/
Dsata_uli.c96 unsigned int cfg_addr = get_scr_cfg_addr(link->ap, sc_reg); in uli_scr_cfg_read() local
99 pci_read_config_dword(pdev, cfg_addr, &val); in uli_scr_cfg_read()
106 unsigned int cfg_addr = get_scr_cfg_addr(link->ap, scr); in uli_scr_cfg_write() local
108 pci_write_config_dword(pdev, cfg_addr, val); in uli_scr_cfg_write()
Dsata_sis.c132 unsigned int cfg_addr = get_scr_cfg_addr(link, sc_reg); in sis_scr_cfg_read() local
137 pci_read_config_dword(pdev, cfg_addr, val); in sis_scr_cfg_read()
145 unsigned int cfg_addr = get_scr_cfg_addr(link, sc_reg); in sis_scr_cfg_write() local
147 pci_write_config_dword(pdev, cfg_addr, val); in sis_scr_cfg_write()
/linux-5.19.10/samples/vfio-mdev/
Dmdpy.c146 u32 cfg_addr; in handle_pci_cfg_write() local
150 cfg_addr = *(u32 *)buf; in handle_pci_cfg_write()
152 if (cfg_addr == 0xffffffff) { in handle_pci_cfg_write()
153 cfg_addr = (cfg_addr & mdev_state->bar_mask); in handle_pci_cfg_write()
155 cfg_addr &= PCI_BASE_ADDRESS_MEM_MASK; in handle_pci_cfg_write()
156 if (cfg_addr) in handle_pci_cfg_write()
157 dev_info(dev, "BAR0 @ 0x%x\n", cfg_addr); in handle_pci_cfg_write()
160 cfg_addr |= (mdev_state->vconfig[offset] & in handle_pci_cfg_write()
162 STORE_LE32(&mdev_state->vconfig[offset], cfg_addr); in handle_pci_cfg_write()
Dmbochs.c302 u32 cfg_addr; in handle_pci_cfg_write() local
307 cfg_addr = *(u32 *)buf; in handle_pci_cfg_write()
309 if (cfg_addr == 0xffffffff) { in handle_pci_cfg_write()
310 cfg_addr = (cfg_addr & mdev_state->bar_mask[index]); in handle_pci_cfg_write()
312 cfg_addr &= PCI_BASE_ADDRESS_MEM_MASK; in handle_pci_cfg_write()
313 if (cfg_addr) in handle_pci_cfg_write()
315 index, cfg_addr); in handle_pci_cfg_write()
318 cfg_addr |= (mdev_state->vconfig[offset] & in handle_pci_cfg_write()
320 STORE_LE32(&mdev_state->vconfig[offset], cfg_addr); in handle_pci_cfg_write()
Dmtty.c242 u32 cfg_addr, bar_mask, bar_index = 0; in handle_pci_cfg_write() local
270 cfg_addr = *(u32 *)buf; in handle_pci_cfg_write()
271 pr_info("BAR%d addr 0x%x\n", bar_index, cfg_addr); in handle_pci_cfg_write()
273 if (cfg_addr == 0xffffffff) { in handle_pci_cfg_write()
275 cfg_addr = (cfg_addr & bar_mask); in handle_pci_cfg_write()
278 cfg_addr |= (mdev_state->vconfig[offset] & 0x3ul); in handle_pci_cfg_write()
279 STORE_LE32(&mdev_state->vconfig[offset], cfg_addr); in handle_pci_cfg_write()
/linux-5.19.10/arch/powerpc/platforms/52xx/
Dmpc52xx_pci.c118 out_be32(hose->cfg_addr, in mpc52xx_pci_read_config()
158 out_be32(hose->cfg_addr, 0); in mpc52xx_pci_read_config()
175 out_be32(hose->cfg_addr, in mpc52xx_pci_write_config()
222 out_be32(hose->cfg_addr, 0); in mpc52xx_pci_write_config()
250 hose->cfg_addr = &pci_regs->car; in mpc52xx_pci_setup()
/linux-5.19.10/arch/microblaze/include/asm/
Dpci-bridge.h56 unsigned int __iomem *cfg_addr; member
125 resource_size_t cfg_addr,
/linux-5.19.10/arch/powerpc/platforms/pseries/
Diommu.c1015 u32 cfg_addr, ext_query, query_out[5]; in query_ddw() local
1039 cfg_addr = ((pdn->busno << 16) | (pdn->devfn << 8)); in query_ddw()
1042 cfg_addr, BUID_HI(buid), BUID_LO(buid)); in query_ddw()
1044 ddw_avail[DDW_QUERY_PE_DMA_WIN], cfg_addr, BUID_HI(buid), in query_ddw()
1072 u32 cfg_addr; in create_ddw() local
1085 cfg_addr = ((pdn->busno << 16) | (pdn->devfn << 8)); in create_ddw()
1090 (u32 *)create, cfg_addr, BUID_HI(buid), in create_ddw()
1096 ddw_avail[DDW_CREATE_PE_DMA_WIN], cfg_addr, BUID_HI(buid), in create_ddw()
1147 u32 cfg_addr, reset_dma_win; in reset_dma_window() local
1159 cfg_addr = (pdn->busno << 16) | (pdn->devfn << 8); in reset_dma_window()
[all …]
/linux-5.19.10/arch/powerpc/include/asm/
Dpci-bridge.h83 unsigned int __iomem *cfg_addr; member
155 resource_size_t cfg_addr,
/linux-5.19.10/arch/xtensa/include/asm/
Dpci-bridge.h43 volatile unsigned int *cfg_addr; member
/linux-5.19.10/drivers/pci/controller/
Dpci-xgene.c68 unsigned long cfg_addr; member
359 port->cfg_addr = res->start; in xgene_pcie_map_reg()
398 u64 addr = port->cfg_addr; in xgene_pcie_setup_cfg_reg()
Dpci-hyperv.c503 void __iomem *cfg_addr; member
1076 void __iomem *addr = hpdev->hbus->cfg_addr + CFG_PAGE_OFFSET + where; in _hv_pcifront_read_config()
1106 writel(hpdev->desc.win_slot.slot, hpdev->hbus->cfg_addr); in _hv_pcifront_read_config()
1137 void __iomem *addr = hpdev->hbus->cfg_addr + CFG_PAGE_OFFSET + in hv_pcifront_get_vendor_id()
1143 writel(hpdev->desc.win_slot.slot, hpdev->hbus->cfg_addr); in hv_pcifront_get_vendor_id()
1169 void __iomem *addr = hpdev->hbus->cfg_addr + CFG_PAGE_OFFSET + where; in _hv_pcifront_write_config()
1177 writel(hpdev->desc.win_slot.slot, hpdev->hbus->cfg_addr); in _hv_pcifront_write_config()
3553 hbus->cfg_addr = ioremap(hbus->mem_config->start, in hv_pci_probe()
3555 if (!hbus->cfg_addr) { in hv_pci_probe()
3650 iounmap(hbus->cfg_addr); in hv_pci_probe()
[all …]
/linux-5.19.10/arch/parisc/kernel/
Dfirmware.c1004 unsigned int pdc_pci_config_read(void *hpa, unsigned long cfg_addr)
1013 __pa(pdc_result), hpa, cfg_addr&~3UL, 4UL);
1028 void pdc_pci_config_write(void *hpa, unsigned long cfg_addr, unsigned int val)
1037 cfg_addr&~3UL, 4UL, (unsigned long) val);
/linux-5.19.10/drivers/misc/cxl/
Dvphb.c246 phb->cfg_addr = NULL; in cxl_pci_vphb_add()
/linux-5.19.10/arch/powerpc/platforms/4xx/
Dpci.c1595 return (void __iomem *)port->hose->cfg_addr; in ppc4xx_pciex_get_config_base()
1979 hose->cfg_addr = mbase; in ppc4xx_pciex_port_setup_hose()
1984 hose->cfg_addr, hose->cfg_data); in ppc4xx_pciex_port_setup_hose()
1989 mbase = (void __iomem *)hose->cfg_addr; in ppc4xx_pciex_port_setup_hose()
/linux-5.19.10/drivers/net/ethernet/huawei/hinic/
Dhinic_hw_dev.h345 u32 cfg_addr; member

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