Home
last modified time | relevance | path

Searched refs:cfgPSWUSCFG0_PCIE_LANE_3_EQUALIZATION_CNTL (Results 1 – 2 of 2) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/nbio/
Dnbio_6_1_offset.h123 #define cfgPSWUSCFG0_PCIE_LANE_3_EQUALIZATION_CNTL macro
Dnbio_7_4_offset.h123 #define cfgPSWUSCFG0_PCIE_LANE_3_EQUALIZATION_CNTL macro