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Searched refs:cbndx (Results 1 – 3 of 3) sorted by relevance

/linux-5.19.10/drivers/iommu/arm/arm-smmu/ !
Darm-smmu-qcom.c49 info->fsr = arm_smmu_cb_read(smmu, cfg->cbndx, ARM_SMMU_CB_FSR); in qcom_adreno_smmu_get_fault_info()
50 info->fsynr0 = arm_smmu_cb_read(smmu, cfg->cbndx, ARM_SMMU_CB_FSYNR0); in qcom_adreno_smmu_get_fault_info()
51 info->fsynr1 = arm_smmu_cb_read(smmu, cfg->cbndx, ARM_SMMU_CB_FSYNR1); in qcom_adreno_smmu_get_fault_info()
52 info->far = arm_smmu_cb_readq(smmu, cfg->cbndx, ARM_SMMU_CB_FAR); in qcom_adreno_smmu_get_fault_info()
53 info->cbfrsynra = arm_smmu_gr1_read(smmu, ARM_SMMU_GR1_CBFRSYNRA(cfg->cbndx)); in qcom_adreno_smmu_get_fault_info()
54 info->ttbr0 = arm_smmu_cb_readq(smmu, cfg->cbndx, ARM_SMMU_CB_TTBR0); in qcom_adreno_smmu_get_fault_info()
55 info->contextidr = arm_smmu_cb_read(smmu, cfg->cbndx, ARM_SMMU_CB_CONTEXTIDR); in qcom_adreno_smmu_get_fault_info()
65 qsmmu->stall_enabled |= BIT(cfg->cbndx); in qcom_adreno_smmu_set_stall()
67 qsmmu->stall_enabled &= ~BIT(cfg->cbndx); in qcom_adreno_smmu_set_stall()
80 arm_smmu_cb_write(smmu, cfg->cbndx, ARM_SMMU_CB_RESUME, reg); in qcom_adreno_smmu_resume_translation()
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Darm-smmu.c250 __arm_smmu_tlb_sync(smmu, ARM_SMMU_CB(smmu, smmu_domain->cfg.cbndx), in arm_smmu_tlb_sync_context()
263 arm_smmu_cb_write(smmu_domain->smmu, smmu_domain->cfg.cbndx, in arm_smmu_tlb_inv_context_s1()
285 int idx = cfg->cbndx; in arm_smmu_tlb_inv_range_s1()
312 int idx = smmu_domain->cfg.cbndx; in arm_smmu_tlb_inv_range_s2()
416 int idx = smmu_domain->cfg.cbndx; in arm_smmu_context_fault()
476 struct arm_smmu_cb *cb = &smmu_domain->smmu->cbs[cfg->cbndx]; in arm_smmu_init_context_bank()
753 cfg->cbndx = ret; in arm_smmu_init_domain_context()
758 cfg->irptndx = cfg->cbndx; in arm_smmu_init_domain_context()
762 cfg->vmid = cfg->cbndx + 1; in arm_smmu_init_domain_context()
764 cfg->asid = cfg->cbndx; in arm_smmu_init_domain_context()
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Darm-smmu.h267 u8 cbndx; member
340 u8 cbndx; member