/linux-5.19.10/drivers/media/platform/qcom/venus/ |
D | hfi_platform_v4.c | 7 static const struct hfi_plat_caps caps[] = { variable 12 .caps[0] = {HFI_CAPABILITY_FRAME_WIDTH, 96, 4096, 1}, 13 .caps[1] = {HFI_CAPABILITY_FRAME_HEIGHT, 96, 4096, 1}, 14 .caps[2] = {HFI_CAPABILITY_MBS_PER_FRAME, 1, 36864, 1}, 15 .caps[3] = {HFI_CAPABILITY_BITRATE, 1, 120000000, 1}, 16 .caps[4] = {HFI_CAPABILITY_SCALE_X, 4096, 65536, 1}, 17 .caps[5] = {HFI_CAPABILITY_SCALE_Y, 4096, 65536, 1}, 18 .caps[6] = {HFI_CAPABILITY_MBS_PER_SECOND, 1, 2073600, 1}, 19 .caps[7] = {HFI_CAPABILITY_FRAMERATE, 1, 480, 1}, 20 .caps[8] = {HFI_CAPABILITY_MAX_VIDEOCORES, 1, 2, 1}, [all …]
|
D | hfi_platform_v6.c | 7 static const struct hfi_plat_caps caps[] = { variable 12 .caps[0] = {HFI_CAPABILITY_FRAME_WIDTH, 128, 8192, 1}, 13 .caps[1] = {HFI_CAPABILITY_FRAME_HEIGHT, 128, 8192, 1}, 15 .caps[2] = {HFI_CAPABILITY_MBS_PER_FRAME, 64, 138240, 1}, 16 .caps[3] = {HFI_CAPABILITY_BITRATE, 1, 220000000, 1}, 17 .caps[4] = {HFI_CAPABILITY_SCALE_X, 65536, 65536, 1}, 18 .caps[5] = {HFI_CAPABILITY_SCALE_Y, 65536, 65536, 1}, 19 .caps[6] = {HFI_CAPABILITY_MBS_PER_SECOND, 64, 7833600, 1}, 20 .caps[7] = {HFI_CAPABILITY_FRAMERATE, 1, 960, 1}, 21 .caps[8] = {HFI_CAPABILITY_MAX_VIDEOCORES, 0, 1, 1}, [all …]
|
D | hfi_parser.c | 19 struct hfi_plat_caps *caps = core->caps, *cap; in init_codecs() local 23 cap = &caps[core->codecs_count++]; in init_codecs() 30 cap = &caps[core->codecs_count++]; in init_codecs() 37 static void for_each_codec(struct hfi_plat_caps *caps, unsigned int caps_num, in for_each_codec() argument 45 cap = &caps[i]; in for_each_codec() 77 for_each_codec(core->caps, ARRAY_SIZE(core->caps), in parse_alloc_mode() 105 for_each_codec(core->caps, ARRAY_SIZE(core->caps), codecs, domain, in parse_profile_level() 112 const struct hfi_capability *caps = data; in fill_caps() local 114 memcpy(&cap->caps[cap->num_caps], caps, num * sizeof(*caps)); in fill_caps() 121 struct hfi_capabilities *caps = data; in parse_caps() local [all …]
|
/linux-5.19.10/drivers/gpu/drm/msm/disp/mdp5/ |
D | mdp5_cfg.c | 21 .caps = MDP_CAP_SMP | 41 .caps = MDP_PIPE_CAP_HFLIP | 50 .caps = MDP_PIPE_CAP_HFLIP | 58 .caps = MDP_PIPE_CAP_HFLIP | 67 .caps = MDP_LM_CAP_DISPLAY, }, 69 .caps = MDP_LM_CAP_DISPLAY, }, 71 .caps = MDP_LM_CAP_DISPLAY, }, 73 .caps = MDP_LM_CAP_WB }, 75 .caps = MDP_LM_CAP_WB }, 110 .caps = MDP_CAP_SMP | [all …]
|
D | mdp5_pipe.c | 10 uint32_t caps, uint32_t blkcfg, in mdp5_pipe_assign() argument 45 if (caps & ~cur->caps) in mdp5_pipe_assign() 52 if (cur->caps & MDP_PIPE_CAP_CURSOR && in mdp5_pipe_assign() 59 if (!(*hwpipe) || (hweight_long(cur->caps & ~caps) < in mdp5_pipe_assign() 60 hweight_long((*hwpipe)->caps & ~caps))) { in mdp5_pipe_assign() 70 if (r_cur->caps != cur->caps) in mdp5_pipe_assign() 110 (*hwpipe)->name, plane->name, caps); in mdp5_pipe_assign() 115 (*r_hwpipe)->name, plane->name, caps); in mdp5_pipe_assign() 160 uint32_t reg_offset, uint32_t caps) in mdp5_pipe_init() argument 171 hwpipe->caps = caps; in mdp5_pipe_init()
|
/linux-5.19.10/drivers/net/wireless/ath/ath5k/ |
D | caps.c | 35 struct ath5k_capabilities *caps = &ah->ah_capabilities; in ath5k_hw_set_capabilities() local 39 ee_header = caps->cap_eeprom.ee_header; in ath5k_hw_set_capabilities() 46 caps->cap_range.range_5ghz_min = 5120; in ath5k_hw_set_capabilities() 47 caps->cap_range.range_5ghz_max = 5430; in ath5k_hw_set_capabilities() 48 caps->cap_range.range_2ghz_min = 0; in ath5k_hw_set_capabilities() 49 caps->cap_range.range_2ghz_max = 0; in ath5k_hw_set_capabilities() 52 __set_bit(AR5K_MODE_11A, caps->cap_mode); in ath5k_hw_set_capabilities() 69 if (ath_is_49ghz_allowed(caps->cap_eeprom.ee_regdomain)) in ath5k_hw_set_capabilities() 70 caps->cap_range.range_5ghz_min = 4920; in ath5k_hw_set_capabilities() 72 caps->cap_range.range_5ghz_min = 5005; in ath5k_hw_set_capabilities() [all …]
|
/linux-5.19.10/drivers/net/ethernet/netronome/nfp/ |
D | nfp_net_ctrl.c | 12 static void nfp_net_tlv_caps_reset(struct nfp_net_tlv_caps *caps) in nfp_net_tlv_caps_reset() argument 14 memset(caps, 0, sizeof(*caps)); in nfp_net_tlv_caps_reset() 15 caps->me_freq_mhz = 1200; in nfp_net_tlv_caps_reset() 16 caps->mbox_off = NFP_NET_CFG_MBOX_BASE; in nfp_net_tlv_caps_reset() 17 caps->mbox_len = NFP_NET_CFG_MBOX_VAL_MAX_SZ; in nfp_net_tlv_caps_reset() 21 nfp_net_tls_parse_crypto_ops(struct device *dev, struct nfp_net_tlv_caps *caps, in nfp_net_tls_parse_crypto_ops() argument 27 if (caps->tls_resync_ss && !rx_stream_scan) in nfp_net_tls_parse_crypto_ops() 37 caps->crypto_ops = readl(data); in nfp_net_tls_parse_crypto_ops() 38 caps->crypto_enable_off = data - ctrl_mem + 16; in nfp_net_tls_parse_crypto_ops() 39 caps->tls_resync_ss = rx_stream_scan; in nfp_net_tls_parse_crypto_ops() [all …]
|
/linux-5.19.10/drivers/gpu/drm/amd/display/dc/dcn10/ |
D | dcn10_dwb.c | 47 static bool dwb1_get_caps(struct dwbc *dwbc, struct dwb_caps *caps) in dwb1_get_caps() argument 49 if (caps) { in dwb1_get_caps() 50 caps->adapter_id = 0; /* we only support 1 adapter currently */ in dwb1_get_caps() 51 caps->hw_version = DCN_VERSION_1_0; in dwb1_get_caps() 52 caps->num_pipes = 2; in dwb1_get_caps() 53 memset(&caps->reserved, 0, sizeof(caps->reserved)); in dwb1_get_caps() 54 memset(&caps->reserved2, 0, sizeof(caps->reserved2)); in dwb1_get_caps() 55 caps->sw_version = dwb_ver_1_0; in dwb1_get_caps() 56 caps->caps.support_dwb = true; in dwb1_get_caps() 57 caps->caps.support_ogam = false; in dwb1_get_caps() [all …]
|
/linux-5.19.10/net/bluetooth/ |
D | hci_codec.c | 12 void *caps, in hci_codec_list_add() argument 31 memcpy(entry->caps, caps, len); in hci_codec_list_add() 57 struct hci_codec_caps *caps; in hci_read_codec_capabilities() local 101 caps = (void *)skb->data; in hci_read_codec_capabilities() 102 if (skb->len < sizeof(*caps)) in hci_read_codec_capabilities() 104 if (skb->len < caps->len) in hci_read_codec_capabilities() 106 len += sizeof(caps->len) + caps->len; in hci_read_codec_capabilities() 107 skb_pull(skb, sizeof(caps->len) + caps->len); in hci_read_codec_capabilities() 127 struct hci_op_read_local_codec_caps caps; in hci_read_supported_codecs() local 157 memset(&caps, 0, sizeof(caps)); in hci_read_supported_codecs() [all …]
|
/linux-5.19.10/drivers/net/ethernet/mellanox/mlx4/ |
D | main.c | 300 dev->caps.reserved_uars = in mlx4_set_num_reserved_uars() 312 if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_DPDP)) { in mlx4_check_port_params() 313 for (i = 0; i < dev->caps.num_ports - 1; i++) { in mlx4_check_port_params() 321 for (i = 0; i < dev->caps.num_ports; i++) { in mlx4_check_port_params() 322 if (!(port_type[i] & dev->caps.supported_type[i+1])) { in mlx4_check_port_params() 335 for (i = 1; i <= dev->caps.num_ports; ++i) in mlx4_set_port_mask() 336 dev->caps.port_mask[i] = dev->caps.port_type[i]; in mlx4_set_port_mask() 348 if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SYS_EQS) { in mlx4_query_func() 364 struct mlx4_caps *dev_cap = &dev->caps; in mlx4_enable_cqe_eqe_stride() 400 dev->caps.vl_cap[port] = port_cap->max_vl; in _mlx4_dev_port() [all …]
|
/linux-5.19.10/drivers/net/ethernet/mellanox/mlx5/core/steering/ |
D | dr_domain.c | 9 ((dmn)->info.caps.dmn_type##_sw_owner || \ 10 ((dmn)->info.caps.dmn_type##_sw_owner_v2 && \ 11 (dmn)->info.caps.sw_format_ver <= MLX5_STEERING_FORMAT_CONNECTX_7)) 63 dmn->ste_ctx = mlx5dr_ste_get_ctx(dmn->info.caps.sw_format_ver); in dr_domain_init_resources() 128 struct mlx5dr_esw_caps *esw_caps = &dmn->info.caps.esw_caps; in dr_domain_fill_uplink_caps() 134 uplink_vport->vhca_gvmi = dmn->info.caps.gvmi; in dr_domain_fill_uplink_caps() 160 vport_caps->vhca_gvmi = dmn->info.caps.gvmi; in dr_domain_query_vport() 168 &dmn->info.caps.vports.esw_manager_caps); in dr_domain_query_esw_mngr() 173 dr_domain_fill_uplink_caps(dmn, &dmn->info.caps.vports.uplink_caps); in dr_domain_query_uplink() 179 struct mlx5dr_cmd_caps *caps = &dmn->info.caps; in dr_domain_add_vport_cap() local [all …]
|
/linux-5.19.10/arch/powerpc/perf/ |
D | hv-common.c | 8 unsigned long hv_perf_caps_get(struct hv_perf_caps *caps) in hv_perf_caps_get() argument 13 struct hv_gpci_system_performance_capabilities caps; in hv_perf_caps_get() member 31 pr_devel("capability_mask: 0x%x\n", arg.caps.capability_mask); in hv_perf_caps_get() 33 caps->version = arg.params.counter_info_version_out; in hv_perf_caps_get() 34 caps->collect_privileged = !!arg.caps.perf_collect_privileged; in hv_perf_caps_get() 35 caps->ga = !!(arg.caps.capability_mask & HV_GPCI_CM_GA); in hv_perf_caps_get() 36 caps->expanded = !!(arg.caps.capability_mask & HV_GPCI_CM_EXPANDED); in hv_perf_caps_get() 37 caps->lab = !!(arg.caps.capability_mask & HV_GPCI_CM_LAB); in hv_perf_caps_get()
|
/linux-5.19.10/drivers/infiniband/hw/hns/ |
D | hns_roce_main.c | 69 if (port >= hr_dev->caps.num_ports) in hns_roce_add_gid() 83 if (port >= hr_dev->caps.num_ports) in hns_roce_del_gid() 136 for (port = 0; port < hr_dev->caps.num_ports; port++) { in hns_roce_netdev_event() 153 for (i = 0; i < hr_dev->caps.num_ports; i++) { in hns_roce_setup_mtu_mac() 171 props->fw_ver = hr_dev->caps.fw_ver; in hns_roce_query_device() 174 props->page_size_cap = hr_dev->caps.page_size_cap; in hns_roce_query_device() 178 props->max_qp = hr_dev->caps.num_qps; in hns_roce_query_device() 179 props->max_qp_wr = hr_dev->caps.max_wqes; in hns_roce_query_device() 182 props->max_send_sge = hr_dev->caps.max_sq_sg; in hns_roce_query_device() 183 props->max_recv_sge = hr_dev->caps.max_rq_sg; in hns_roce_query_device() [all …]
|
D | hns_roce_hw_v2.c | 1562 hr_dev->caps.fw_ver = (u64)(le32_to_cpu(resp->fw_ver)); in hns_roce_query_fw_ver() 1616 struct hns_roce_caps *caps = &hr_dev->caps; in load_func_res_caps() local 1637 caps->qpc_bt_num = hr_reg_read(r_a, FUNC_RES_A_QPC_BT_NUM) / func_num; in load_func_res_caps() 1638 caps->srqc_bt_num = hr_reg_read(r_a, FUNC_RES_A_SRQC_BT_NUM) / func_num; in load_func_res_caps() 1639 caps->cqc_bt_num = hr_reg_read(r_a, FUNC_RES_A_CQC_BT_NUM) / func_num; in load_func_res_caps() 1640 caps->mpt_bt_num = hr_reg_read(r_a, FUNC_RES_A_MPT_BT_NUM) / func_num; in load_func_res_caps() 1641 caps->eqc_bt_num = hr_reg_read(r_a, FUNC_RES_A_EQC_BT_NUM) / func_num; in load_func_res_caps() 1642 caps->smac_bt_num = hr_reg_read(r_b, FUNC_RES_B_SMAC_NUM) / func_num; in load_func_res_caps() 1643 caps->sgid_bt_num = hr_reg_read(r_b, FUNC_RES_B_SGID_NUM) / func_num; in load_func_res_caps() 1644 caps->sccc_bt_num = hr_reg_read(r_b, FUNC_RES_B_SCCC_BT_NUM) / func_num; in load_func_res_caps() [all …]
|
/linux-5.19.10/tools/power/cpupower/utils/helpers/ |
D | cpuid.c | 60 cpu_info->caps = 0; in get_cpu_info() 122 cpu_info->caps |= CPUPOWER_CAP_INV_TSC; in get_cpu_info() 126 cpu_info->caps |= CPUPOWER_CAP_APERF; in get_cpu_info() 133 cpu_info->caps |= CPUPOWER_CAP_AMD_CPB; in get_cpu_info() 136 cpu_info->caps |= CPUPOWER_CAP_AMD_CPB_MSR; in get_cpu_info() 142 cpu_info->caps |= CPUPOWER_CAP_AMD_HW_PSTATE; in get_cpu_info() 145 cpu_info->caps |= CPUPOWER_CAP_AMD_PSTATEDEF; in get_cpu_info() 151 cpu_info->caps |= CPUPOWER_CAP_AMD_RDPRU; in get_cpu_info() 154 cpu_info->caps |= CPUPOWER_CAP_AMD_PSTATE; in get_cpu_info() 160 cpu_info->caps &= ~CPUPOWER_CAP_AMD_CPB; in get_cpu_info() [all …]
|
/linux-5.19.10/arch/powerpc/platforms/pseries/ |
D | vas-sysfs.c | 23 struct vas_cop_feat_caps *caps; member 32 static ssize_t update_total_credits_store(struct vas_cop_feat_caps *caps, in update_total_credits_store() argument 48 err = vas_reconfig_capabilties(caps->win_type, creds); in update_total_credits_store() 59 static ssize_t _name##_show(struct vas_cop_feat_caps *caps, char *buf) \ 61 return sprintf(buf, "%d\n", atomic_read(&caps->_name)); \ 125 struct vas_cop_feat_caps *caps; in vas_type_show() local 129 caps = centry->caps; in vas_type_show() 135 return entry->show(caps, buf); in vas_type_show() 142 struct vas_cop_feat_caps *caps; in vas_type_store() local 146 caps = centry->caps; in vas_type_store() [all …]
|
D | vas.c | 275 struct vas_caps *caps; in vas_allocate_window() local 308 caps = &vascaps[VAS_GZIP_QOS_FEAT_TYPE]; in vas_allocate_window() 310 caps = &vascaps[VAS_GZIP_DEF_FEAT_TYPE]; in vas_allocate_window() 312 cop_feat_caps = &caps->caps; in vas_allocate_window() 388 if (!caps->nr_close_wins) { in vas_allocate_window() 389 list_add(&txwin->win_list, &caps->list); in vas_allocate_window() 390 caps->nr_open_windows++; in vas_allocate_window() 445 struct vas_cop_feat_caps *caps; in vas_deallocate_window() local 460 caps = &vascaps[win->win_type].caps; in vas_deallocate_window() 479 atomic_dec(&caps->nr_used_credits); in vas_deallocate_window() [all …]
|
/linux-5.19.10/drivers/soc/mediatek/ |
D | mt8186-pm-domains.h | 26 .caps = MTK_SCPD_KEEP_DEFAULT_OFF | MTK_SCPD_DOMAIN_SUPPLY, 54 .caps = MTK_SCPD_KEEP_DEFAULT_OFF, 64 .caps = MTK_SCPD_KEEP_DEFAULT_OFF, 74 .caps = MTK_SCPD_KEEP_DEFAULT_OFF, 84 .caps = MTK_SCPD_ACTIVE_WAKEUP, 94 .caps = MTK_SCPD_ACTIVE_WAKEUP, 133 .caps = MTK_SCPD_KEEP_DEFAULT_OFF, 143 .caps = MTK_SCPD_KEEP_DEFAULT_OFF, 163 .caps = MTK_SCPD_KEEP_DEFAULT_OFF, 183 .caps = MTK_SCPD_KEEP_DEFAULT_OFF, [all …]
|
D | mt8195-pm-domains.h | 62 .caps = MTK_SCPD_ACTIVE_WAKEUP, 70 .caps = MTK_SCPD_ACTIVE_WAKEUP, 78 .caps = MTK_SCPD_KEEP_DEFAULT_OFF, 88 .caps = MTK_SCPD_ACTIVE_WAKEUP, 104 .caps = MTK_SCPD_SRAM_ISO | MTK_SCPD_ACTIVE_WAKEUP, 129 .caps = MTK_SCPD_KEEP_DEFAULT_OFF | MTK_SCPD_DOMAIN_SUPPLY, 165 .caps = MTK_SCPD_KEEP_DEFAULT_OFF, 175 .caps = MTK_SCPD_KEEP_DEFAULT_OFF, 185 .caps = MTK_SCPD_KEEP_DEFAULT_OFF, 195 .caps = MTK_SCPD_KEEP_DEFAULT_OFF, [all …]
|
/linux-5.19.10/drivers/gpu/drm/amd/display/dc/dcn30/ |
D | dcn30_dwb.c | 46 static bool dwb3_get_caps(struct dwbc *dwbc, struct dwb_caps *caps) in dwb3_get_caps() argument 48 if (caps) { in dwb3_get_caps() 49 caps->adapter_id = 0; /* we only support 1 adapter currently */ in dwb3_get_caps() 50 caps->hw_version = DCN_VERSION_3_0; in dwb3_get_caps() 51 caps->num_pipes = 2; in dwb3_get_caps() 52 memset(&caps->reserved, 0, sizeof(caps->reserved)); in dwb3_get_caps() 53 memset(&caps->reserved2, 0, sizeof(caps->reserved2)); in dwb3_get_caps() 54 caps->sw_version = dwb_ver_2_0; in dwb3_get_caps() 55 caps->caps.support_dwb = true; in dwb3_get_caps() 56 caps->caps.support_ogam = true; in dwb3_get_caps() [all …]
|
/linux-5.19.10/drivers/vfio/pci/ |
D | vfio_pci_zdev.c | 22 static int zpci_base_cap(struct zpci_dev *zdev, struct vfio_info_cap *caps) in zpci_base_cap() argument 36 return vfio_info_add_capability(caps, &cap.header, sizeof(cap)); in zpci_base_cap() 42 static int zpci_group_cap(struct zpci_dev *zdev, struct vfio_info_cap *caps) in zpci_group_cap() argument 56 return vfio_info_add_capability(caps, &cap.header, sizeof(cap)); in zpci_group_cap() 62 static int zpci_util_cap(struct zpci_dev *zdev, struct vfio_info_cap *caps) in zpci_util_cap() argument 77 ret = vfio_info_add_capability(caps, &cap->header, cap_size); in zpci_util_cap() 87 static int zpci_pfip_cap(struct zpci_dev *zdev, struct vfio_info_cap *caps) in zpci_pfip_cap() argument 102 ret = vfio_info_add_capability(caps, &cap->header, cap_size); in zpci_pfip_cap() 113 struct vfio_info_cap *caps) in vfio_pci_info_zdev_add_caps() argument 121 ret = zpci_base_cap(zdev, caps); in vfio_pci_info_zdev_add_caps() [all …]
|
/linux-5.19.10/drivers/gpu/drm/omapdrm/ |
D | omap_overlay.c | 29 u32 caps, u32 fourcc) in omap_plane_find_free_overlay() argument 34 DBG("caps: %x fourcc: %x", caps, fourcc); in omap_plane_find_free_overlay() 40 cur->idx, cur->id, cur->caps); in omap_plane_find_free_overlay() 47 if (caps & ~cur->caps) in omap_plane_find_free_overlay() 70 u32 caps, u32 fourcc, struct omap_hw_overlay **overlay, in omap_overlay_assign() argument 78 ovl = omap_plane_find_free_overlay(s->dev, overlay_map, caps, fourcc); in omap_overlay_assign() 87 caps, fourcc); in omap_overlay_assign() 98 DBG("%s: assign to plane %s caps %x", ovl->name, plane->name, caps); in omap_overlay_assign() 102 r_ovl->name, plane->name, caps); in omap_overlay_assign() 158 enum omap_overlay_caps caps) in omap_overlay_init() argument [all …]
|
/linux-5.19.10/drivers/gpu/drm/stm/ |
D | ltdc.c | 58 #define LAY_OFS (ldev->caps.layer_ofs) 84 #define LTDC_L1C0R (ldev->caps.layer_regs[0]) /* L1 configuration 0 */ 85 #define LTDC_L1C1R (ldev->caps.layer_regs[1]) /* L1 configuration 1 */ 86 #define LTDC_L1RCR (ldev->caps.layer_regs[2]) /* L1 reload control */ 87 #define LTDC_L1CR (ldev->caps.layer_regs[3]) /* L1 control register */ 88 #define LTDC_L1WHPCR (ldev->caps.layer_regs[4]) /* L1 window horizontal position configuration */ 89 #define LTDC_L1WVPCR (ldev->caps.layer_regs[5]) /* L1 window vertical position configuration */ 90 #define LTDC_L1CKCR (ldev->caps.layer_regs[6]) /* L1 color keying configuration */ 91 #define LTDC_L1PFCR (ldev->caps.layer_regs[7]) /* L1 pixel format configuration */ 92 #define LTDC_L1CACR (ldev->caps.layer_regs[8]) /* L1 constant alpha configuration */ [all …]
|
/linux-5.19.10/drivers/gpu/drm/arm/display/komeda/ |
D | komeda_format_caps.c | 16 const struct komeda_format_caps *caps; in komeda_get_format_caps() local 22 caps = &table->format_caps[id]; in komeda_get_format_caps() 24 if (fourcc != caps->fourcc) in komeda_get_format_caps() 27 if ((modifier == 0ULL) && (caps->supported_afbc_layouts == 0)) in komeda_get_format_caps() 28 return caps; in komeda_get_format_caps() 30 if (has_bits(afbc_features, caps->supported_afbc_features) && in komeda_get_format_caps() 31 has_bit(afbc_layout, caps->supported_afbc_layouts)) in komeda_get_format_caps() 32 return caps; in komeda_get_format_caps() 99 const struct komeda_format_caps *caps; in komeda_format_mod_supported() local 101 caps = komeda_get_format_caps(table, fourcc, modifier); in komeda_format_mod_supported() [all …]
|
/linux-5.19.10/drivers/infiniband/hw/vmw_pvrdma/ |
D | pvrdma_verbs.c | 74 props->fw_ver = dev->dsr->caps.fw_ver; in pvrdma_query_device() 75 props->sys_image_guid = dev->dsr->caps.sys_image_guid; in pvrdma_query_device() 76 props->max_mr_size = dev->dsr->caps.max_mr_size; in pvrdma_query_device() 77 props->page_size_cap = dev->dsr->caps.page_size_cap; in pvrdma_query_device() 78 props->vendor_id = dev->dsr->caps.vendor_id; in pvrdma_query_device() 80 props->hw_ver = dev->dsr->caps.hw_ver; in pvrdma_query_device() 81 props->max_qp = dev->dsr->caps.max_qp; in pvrdma_query_device() 82 props->max_qp_wr = dev->dsr->caps.max_qp_wr; in pvrdma_query_device() 83 props->device_cap_flags = dev->dsr->caps.device_cap_flags; in pvrdma_query_device() 84 props->max_send_sge = dev->dsr->caps.max_sge; in pvrdma_query_device() [all …]
|