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Searched refs:bootcr (Results 1 – 2 of 2) sorted by relevance

/linux-5.19.10/arch/mips/ar7/
Dclock.c162 u32 *bootcr, u32 bus_clock) in tnetd7300_get_clock() argument
173 switch ((*bootcr & (BOOT_PLL_SOURCE_MASK << shift)) >> shift) { in tnetd7300_get_clock()
188 if (*bootcr & BOOT_PLL_BYPASS) in tnetd7300_get_clock()
208 u32 *bootcr, u32 frequency) in tnetd7300_set_clock() argument
213 switch ((*bootcr & (BOOT_PLL_SOURCE_MASK << shift)) >> shift) { in tnetd7300_set_clock()
241 u32 *bootcr = (u32 *)ioremap(AR7_REGS_DCL, 4); in tnetd7300_init_clocks() local
249 &clocks->bus, bootcr, AR7_AFE_CLOCK); in tnetd7300_init_clocks()
251 if (*bootcr & BOOT_PLL_ASYNC_MODE) in tnetd7300_init_clocks()
253 &clocks->cpu, bootcr, AR7_AFE_CLOCK); in tnetd7300_init_clocks()
260 bootcr, dsp_clk); in tnetd7300_init_clocks()
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Dplatform.c640 void __iomem *bootcr; in ar7_register_devices() local
705 bootcr = ioremap(AR7_REGS_DCL, 4); in ar7_register_devices()
706 val = readl(bootcr); in ar7_register_devices()
707 iounmap(bootcr); in ar7_register_devices()