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Searched refs:bCCKSideBand (Results 1 – 10 of 10) sorted by relevance

/linux-5.19.10/drivers/staging/rtl8192u/
Dr819xU_phyreg.h121 #define bCCKSideBand 0x10 macro
Dr819xU_phy.c1533 rtl8192_setBBreg(dev, rCCK0_System, bCCKSideBand, in rtl8192_SetBWModeWorkItem()
/linux-5.19.10/drivers/staging/rtl8192e/rtl8192e/
Dr8192E_phyreg.h427 #define bCCKSideBand 0x10 macro
Dr8192E_phy.c1218 rtl92e_set_bb_reg(dev, rCCK0_System, bCCKSideBand, in _rtl92e_set_bw_mode_work_item()
/linux-5.19.10/drivers/staging/r8188eu/hal/
Drtl8188e_phycfg.c657 rtl8188e_PHY_SetBBReg(Adapter, rCCK0_System, bCCKSideBand, (pHalData->nCur40MhzPrimeSC >> 1)); in _PHY_SetBWMode92C()
/linux-5.19.10/drivers/staging/rtl8712/
Drtl871x_mp_phy_regdef.h585 #define bCCKSideBand 0x10 /* Reg 0xa00 rCCK0_System 20/40 switch*/ macro
Drtl871x_mp.c366 set_bb_reg(pAdapter, rCCK0_System, bCCKSideBand, in r8712_SwitchBandwidth()
/linux-5.19.10/drivers/staging/r8188eu/include/
DHal8188EPhyReg.h651 #define bCCKSideBand 0x10 /* Reg 0xa00 rCCK0_System 20/40 */ macro
/linux-5.19.10/drivers/staging/rtl8723bs/include/
DHal8192CPhyReg.h676 #define bCCKSideBand 0x10 /* Reg 0xa00 rCCK0_System 20/40 switch */ macro
/linux-5.19.10/drivers/staging/rtl8723bs/hal/
Drtl8723b_phycfg.c653 PHY_SetBBReg(Adapter, rCCK0_System, bCCKSideBand, (pHalData->nCur40MhzPrimeSC>>1)); in phy_PostSetBwMode8723B()