Searched refs:bCCKSideBand (Results 1 – 10 of 10) sorted by relevance
/linux-5.19.10/drivers/staging/rtl8192u/ |
D | r819xU_phyreg.h | 121 #define bCCKSideBand 0x10 macro
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D | r819xU_phy.c | 1533 rtl8192_setBBreg(dev, rCCK0_System, bCCKSideBand, in rtl8192_SetBWModeWorkItem()
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/linux-5.19.10/drivers/staging/rtl8192e/rtl8192e/ |
D | r8192E_phyreg.h | 427 #define bCCKSideBand 0x10 macro
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D | r8192E_phy.c | 1218 rtl92e_set_bb_reg(dev, rCCK0_System, bCCKSideBand, in _rtl92e_set_bw_mode_work_item()
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/linux-5.19.10/drivers/staging/r8188eu/hal/ |
D | rtl8188e_phycfg.c | 657 rtl8188e_PHY_SetBBReg(Adapter, rCCK0_System, bCCKSideBand, (pHalData->nCur40MhzPrimeSC >> 1)); in _PHY_SetBWMode92C()
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/linux-5.19.10/drivers/staging/rtl8712/ |
D | rtl871x_mp_phy_regdef.h | 585 #define bCCKSideBand 0x10 /* Reg 0xa00 rCCK0_System 20/40 switch*/ macro
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D | rtl871x_mp.c | 366 set_bb_reg(pAdapter, rCCK0_System, bCCKSideBand, in r8712_SwitchBandwidth()
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/linux-5.19.10/drivers/staging/r8188eu/include/ |
D | Hal8188EPhyReg.h | 651 #define bCCKSideBand 0x10 /* Reg 0xa00 rCCK0_System 20/40 */ macro
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/linux-5.19.10/drivers/staging/rtl8723bs/include/ |
D | Hal8192CPhyReg.h | 676 #define bCCKSideBand 0x10 /* Reg 0xa00 rCCK0_System 20/40 switch */ macro
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/linux-5.19.10/drivers/staging/rtl8723bs/hal/ |
D | rtl8723b_phycfg.c | 653 PHY_SetBBReg(Adapter, rCCK0_System, bCCKSideBand, (pHalData->nCur40MhzPrimeSC>>1)); in phy_PostSetBwMode8723B()
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