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/linux-5.19.10/Documentation/devicetree/bindings/phy/
Dmixel,mipi-dsi-phy.yaml35 assigned-clocks:
38 assigned-clock-parents:
41 assigned-clock-rates:
74 - assigned-clocks
75 - assigned-clock-parents
76 - assigned-clock-rates
85 assigned-clocks: false
86 assigned-clock-parents: false
87 assigned-clock-rates: false
102 assigned-clocks = <&clk IMX8MQ_CLK_DSI_PHY_REF>;
[all …]
Dti,phy-j721e-wiz.yaml51 assigned-clocks:
55 assigned-clock-parents:
59 assigned-clock-rates:
96 assigned-clocks:
99 assigned-clock-parents:
105 - assigned-clocks
106 - assigned-clock-parents
122 assigned-clocks:
125 assigned-clock-parents:
131 - assigned-clocks
[all …]
/linux-5.19.10/Documentation/devicetree/bindings/sound/
Dnvidia,tegra-audio-graph-card.yaml35 assigned-clocks:
39 assigned-clock-parents:
43 assigned-clock-rates:
63 - assigned-clocks
64 - assigned-clock-parents
79 assigned-clocks = <&tegra_car TEGRA210_CLK_PLL_A>,
82 assigned-clock-parents = <0>, <0>, <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
83 assigned-clock-rates = <368640000>, <49152000>, <12288000>;
101 assigned-clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;
102 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
[all …]
Dbrcm,cygnus-audio.txt13 - assigned-clocks: PLL and leaf clocks
14 - assigned-clock-parents: parent clocks of the assigned clocks
16 - assigned-clock-rates: List of clock frequencies of the
17 assigned clocks
36 assigned-clocks = <&audiopll BCM_CYGNUS_AUDIOPLL>,
40 assigned-clock-parents = <&audiopll BCM_CYGNUS_AUDIOPLL>;
41 assigned-clock-rates = <1769470191>,
Dnvidia,tegra210-ahub.yaml43 assigned-clocks:
46 assigned-clock-parents:
49 assigned-clock-rates:
118 - assigned-clocks
119 - assigned-clock-parents
135 assigned-clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;
136 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
172 assigned-clocks = <&tegra_car TEGRA210_CLK_I2S0>;
173 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
174 assigned-clock-rates = <1536000>;
[all …]
Dnvidia,tegra210-dmic.yaml45 assigned-clocks:
48 assigned-clock-parents:
51 assigned-clock-rates:
79 - assigned-clocks
80 - assigned-clock-parents
93 assigned-clocks = <&tegra_car TEGRA210_CLK_DMIC1>;
94 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
95 assigned-clock-rates = <3072000>;
Dnvidia,tegra186-dspk.yaml45 assigned-clocks:
48 assigned-clock-parents:
51 assigned-clock-rates:
79 - assigned-clocks
80 - assigned-clock-parents
94 assigned-clocks = <&bpmp TEGRA186_CLK_DSPK1>;
95 assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
96 assigned-clock-rates = <12288000>;
Dmt2701-afe-pcm.txt47 - assigned-clocks: list of input clocks and dividers for the audio system.
49 - assigned-clocks-parents: parent of input clocks of assigned clocks.
50 - assigned-clock-rates: list of clock frequencies of assigned clocks.
138 assigned-clocks = <&topckgen CLK_TOP_AUD_MUX1_SEL>,
142 assigned-clock-parents = <&topckgen CLK_TOP_AUD1PLL_98M>,
144 assigned-clock-rates = <0>, <0>, <49152000>, <45158400>;
Dnvidia,tegra210-i2s.yaml58 assigned-clocks:
62 assigned-clock-parents:
66 assigned-clock-rates:
95 - assigned-clocks
96 - assigned-clock-parents
109 assigned-clocks = <&tegra_car TEGRA210_CLK_I2S0>;
110 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
111 assigned-clock-rates = <1536000>;
/linux-5.19.10/arch/arm/boot/dts/
Dimx7ulp.dtsi154 assigned-clocks = <&pcc2 IMX7ULP_CLK_LPUART4>;
155 assigned-clock-parents = <&scg1 IMX7ULP_CLK_SOSC_BUS_CLK>;
156 assigned-clock-rates = <24000000>;
166 assigned-clocks = <&pcc2 IMX7ULP_CLK_LPUART5>;
167 assigned-clock-parents = <&scg1 IMX7ULP_CLK_FIRC>;
168 assigned-clock-rates = <48000000>;
175 assigned-clocks = <&pcc2 IMX7ULP_CLK_LPTPM4>;
176 assigned-clock-parents = <&scg1 IMX7ULP_CLK_SOSC_BUS_CLK>;
261 assigned-clocks = <&pcc2 IMX7ULP_CLK_WDG1>;
262 assigned-clock-parents = <&scg1 IMX7ULP_CLK_FIRC_BUS_CLK>;
[all …]
Dexynos4412-odroid-common.dtsi126 assigned-clocks = <&clock CLK_FOUT_EPLL>;
127 assigned-clock-rates = <45158401>;
131 assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
137 assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
140 assigned-clock-rates = <0>, <0>,
208 assigned-clocks = <&clock CLK_MOUT_FIMC0>,
210 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
211 assigned-clock-rates = <0>, <176000000>;
216 assigned-clocks = <&clock CLK_MOUT_FIMC1>,
218 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
[all …]
Dimx7d-pico.dtsi105 assigned-clocks = <&clks IMX7D_CLKO2_ROOT_SRC>,
107 assigned-clock-parents = <&clks IMX7D_CKIL>;
108 assigned-clock-rates = <0>, <32768>;
121 assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>,
123 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
124 assigned-clock-rates = <0>, <100000000>;
278 assigned-clocks = <&clks IMX7D_SAI1_ROOT_SRC>,
280 assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
281 assigned-clock-rates = <0>, <24576000>;
313 assigned-clocks = <&clks IMX7D_UART5_ROOT_SRC>;
[all …]
/linux-5.19.10/Documentation/devicetree/bindings/iio/adc/
Dnxp,imx8qxp-adc.yaml33 assigned-clocks:
36 assigned-clock-rates:
51 - assigned-clocks
52 - assigned-clock-rates
72 assigned-clocks = <&clk IMX_SC_R_ADC_0>;
73 assigned-clock-rates = <24000000>;
/linux-5.19.10/arch/arm64/boot/dts/freescale/
Dimx8ulp.dtsi158 assigned-clocks = <&pcc3 IMX8ULP_CLK_WDOG3>;
159 assigned-clock-parents = <&cgc1 IMX8ULP_CLK_SOSC_DIV2>;
194 assigned-clocks = <&pcc3 IMX8ULP_CLK_LPI2C4>;
195 assigned-clock-parents = <&cgc1 IMX8ULP_CLK_XBAR_DIVBUS>;
196 assigned-clock-rates = <48000000>;
207 assigned-clocks = <&pcc3 IMX8ULP_CLK_LPI2C5>;
208 assigned-clock-parents = <&cgc1 IMX8ULP_CLK_XBAR_DIVBUS>;
209 assigned-clock-rates = <48000000>;
240 assigned-clocks = <&pcc3 IMX8ULP_CLK_LPSPI4>;
241 assigned-clock-parents = <&cgc1 IMX8ULP_CLK_XBAR_DIVBUS>;
[all …]
Dimx8mq-mnt-reform2.dts105 assigned-clocks = <&clk IMX8MQ_CLK_DSI_PHY_REF>;
106 assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_800M>;
107 assigned-clock-rates = <25000000>;
175 assigned-clocks = <&clk IMX8MQ_CLK_LCDIF_PIXEL>;
176 assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_800M>;
177 /delete-property/assigned-clock-rates;
237 assigned-clocks = <&clk IMX8MQ_CLK_SAI2>;
238 assigned-clock-parents = <&clk IMX8MQ_CLK_25M>;
239 assigned-clock-rates = <25000000>;
276 assigned-clocks = <&clk IMX8MQ_CLK_USDHC2>;
[all …]
/linux-5.19.10/Documentation/devicetree/bindings/ufs/
Dti,j721e-ufs.yaml28 assigned-clocks:
31 assigned-clock-parents:
71 assigned-clocks = <&k3_clks 277 1>;
72 assigned-clock-parents = <&k3_clks 277 4>;
85 assigned-clocks = <&k3_clks 277 1>;
86 assigned-clock-parents = <&k3_clks 277 4>;
/linux-5.19.10/Documentation/devicetree/bindings/media/
Dmediatek,vcodec-decoder.yaml43 assigned-clocks: true
45 assigned-clock-parents: true
47 assigned-clock-rates: true
81 - assigned-clocks
82 - assigned-clock-parents
158 assigned-clocks = <&topckgen CLK_TOP_VENC_LT_SEL>,
163 assigned-clock-parents = <&topckgen CLK_TOP_VCODECPLL_370P5>,
166 assigned-clock-rates = <0>, <0>, <0>, <1482000000>, <800000000>;
Dmediatek,vcodec-subdev-decoder.yaml116 assigned-clocks:
119 assigned-clock-parents:
132 - assigned-clocks
133 - assigned-clock-parents
169 assigned-clocks:
172 assigned-clock-parents:
185 - assigned-clocks
186 - assigned-clock-parents
241 assigned-clocks = <&topckgen CLK_TOP_VDEC_SEL>;
242 assigned-clock-parents = <&topckgen CLK_TOP_MAINPLL_D4>;
[all …]
Dmediatek,vcodec-encoder.yaml40 assigned-clocks: true
42 assigned-clock-parents: true
76 - assigned-clocks
77 - assigned-clock-parents
157 assigned-clocks = <&topckgen CLK_TOP_VENC_SEL>;
158 assigned-clock-parents = <&topckgen CLK_TOP_VCODECPLL>;
177 assigned-clocks = <&topckgen CLK_TOP_VENC_LT_SEL>;
178 assigned-clock-parents = <&topckgen CLK_TOP_VCODECPLL_370P5>;
/linux-5.19.10/arch/mips/boot/dts/img/
Dpistachio.dtsi51 assigned-clocks = <&clk_periph PERIPH_CLK_I2C0_PRE_DIV>,
53 assigned-clock-rates = <100000000>, <33333334>;
69 assigned-clocks = <&clk_periph PERIPH_CLK_I2C1_PRE_DIV>,
71 assigned-clock-rates = <100000000>, <33333334>;
87 assigned-clocks = <&clk_periph PERIPH_CLK_I2C2_PRE_DIV>,
89 assigned-clock-rates = <100000000>, <33333334>;
105 assigned-clocks = <&clk_periph PERIPH_CLK_I2C3_PRE_DIV>,
107 assigned-clock-rates = <100000000>, <33333334>;
141 assigned-clocks = <&clk_core CLK_I2S_DIV>;
142 assigned-clock-rates = <12288000>;
[all …]
/linux-5.19.10/Documentation/devicetree/bindings/media/i2c/
Dovti,ov5648.yaml23 assigned-clocks:
26 assigned-clock-rates:
71 - assigned-clocks
72 - assigned-clock-rates
96 assigned-clocks = <&ov5648_xvclk 0>;
97 assigned-clock-rates = <24000000>;
Dovti,ov9282.yaml27 assigned-clocks: true
28 assigned-clock-parents: true
29 assigned-clock-rates: true
78 assigned-clocks = <&ov9282_clk>;
79 assigned-clock-parents = <&ov9282_clk_parent>;
80 assigned-clock-rates = <24000000>;
Dsony,imx335.yaml27 assigned-clocks: true
28 assigned-clock-parents: true
29 assigned-clock-rates: true
78 assigned-clocks = <&imx335_clk>;
79 assigned-clock-parents = <&imx335_clk_parent>;
80 assigned-clock-rates = <24000000>;
Dovti,ov8865.yaml23 assigned-clocks:
26 assigned-clock-rates:
71 - assigned-clocks
72 - assigned-clock-rates
97 assigned-clocks = <&ccu CLK_CSI_MCLK>;
98 assigned-clock-rates = <24000000>;
Dsony,imx334.yaml27 assigned-clocks: true
28 assigned-clock-parents: true
29 assigned-clock-rates: true
77 assigned-clocks = <&imx334_clk>;
78 assigned-clock-parents = <&imx334_clk_parent>;
79 assigned-clock-rates = <24000000>;

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