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Searched refs:alpha_mode (Results 1 – 14 of 14) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/display/dc/dce/
Ddce_hwseq.c104 uint32_t alpha_mode = 2; in dce_set_blender_mode() local
110 alpha_mode = 0; in dce_set_blender_mode()
115 alpha_mode = 0; in dce_set_blender_mode()
132 BLND_ALPHA_MODE, alpha_mode, in dce_set_blender_mode()
/linux-5.19.10/drivers/gpu/drm/rockchip/
Drockchip_vop_reg.c110 .alpha_mode = VOP_REG(RK3036_DSP_CTRL0, 0x1, 18),
128 .alpha_mode = VOP_REG(RK3036_DSP_CTRL0, 0x1, 19),
197 .alpha_mode = VOP_REG(RK3036_DSP_CTRL0, 0x1, 19),
287 .alpha_mode = VOP_REG(PX30_WIN0_ALPHA_CTRL, 0x1, 1),
304 .alpha_mode = VOP_REG(PX30_WIN1_ALPHA_CTRL, 0x1, 1),
321 .alpha_mode = VOP_REG(PX30_WIN2_ALPHA_CTRL, 0x1, 1),
384 .alpha_mode = VOP_REG(RK3066_DSP_CTRL0, 0x1, 21),
403 .alpha_mode = VOP_REG(RK3066_DSP_CTRL0, 0x1, 22),
418 .alpha_mode = VOP_REG(RK3066_DSP_CTRL0, 0x1, 23),
506 .alpha_mode = VOP_REG(RK3188_DSP_CTRL0, 0x1, 18),
[all …]
Drockchip_drm_vop.h197 struct vop_reg alpha_mode; member
283 enum alpha_mode { enum
Drockchip_drm_vop2.c109 u32 alpha_mode:1; member
1677 alpha->src_color_ctrl.bits.alpha_mode = ALPHA_STRAIGHT; in vop2_parse_alpha()
1680 alpha->dst_color_ctrl.bits.alpha_mode = ALPHA_STRAIGHT; in vop2_parse_alpha()
1687 alpha->src_alpha_ctrl.bits.alpha_mode = ALPHA_STRAIGHT; in vop2_parse_alpha()
1692 alpha->dst_alpha_ctrl.bits.alpha_mode = ALPHA_STRAIGHT; in vop2_parse_alpha()
Drockchip_drm_vop.c1041 VOP_WIN_SET(vop, win, alpha_mode, ALPHA_PER_PIX); in vop_plane_atomic_update()
/linux-5.19.10/drivers/gpu/drm/amd/display/dc/inc/hw/
Dmpc.h62 enum mpcc_alpha_blend_mode alpha_mode; /* alpha blend mode */ member
145 uint32_t alpha_mode; member
/linux-5.19.10/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_mpc.c80 MPCC_ALPHA_BLND_MODE, blnd_cfg->alpha_mode, in mpc1_update_blending()
463 MPCC_ALPHA_BLND_MODE, &s->alpha_mode, in mpc1_read_mpcc_state()
Ddcn10_hw_sequencer_debug.c402 s.mode, s.alpha_mode, s.pre_multiplied_alpha, s.overlap_only, in dcn10_get_mpcc_states()
Ddcn10_hw_sequencer.c344 s.mode, s.alpha_mode, s.pre_multiplied_alpha, s.overlap_only, in dcn10_log_hw_state()
2562 blnd_cfg.alpha_mode = MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA_COMBINED_GLOBAL_GAIN; in dcn10_update_mpcc()
2565 blnd_cfg.alpha_mode = MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA; in dcn10_update_mpcc()
2569 blnd_cfg.alpha_mode = MPCC_ALPHA_BLEND_MODE_GLOBAL_ALPHA; in dcn10_update_mpcc()
/linux-5.19.10/drivers/gpu/drm/amd/display/dc/dcn201/
Ddcn201_hwseq.c458 blnd_cfg.alpha_mode = MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA; in dcn201_update_mpcc()
460 blnd_cfg.alpha_mode = MPCC_ALPHA_BLEND_MODE_GLOBAL_ALPHA; in dcn201_update_mpcc()
/linux-5.19.10/drivers/video/fbdev/
Dau1200fb.c116 unsigned int alpha_mode; member
1308 val |= ((pdata->alpha_mode << 1) & LCD_WINCTRL0_AEN); in set_window()
1394 pdata->alpha_mode = (lcd->window[plane].winctrl0 & LCD_WINCTRL0_AEN) >> 1; in get_window()
/linux-5.19.10/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_mpc.c58 MPCC_ALPHA_BLND_MODE, blnd_cfg->alpha_mode, in mpc2_update_blending()
Ddcn20_hwseq.c2351 blnd_cfg.alpha_mode = MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA_COMBINED_GLOBAL_GAIN; in dcn20_update_mpcc()
2354 blnd_cfg.alpha_mode = MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA; in dcn20_update_mpcc()
2358 blnd_cfg.alpha_mode = MPCC_ALPHA_BLEND_MODE_GLOBAL_ALPHA; in dcn20_update_mpcc()
/linux-5.19.10/drivers/media/pci/ivtv/
Divtv-ioctl.c1527 static const char * const alpha_mode[4] = { in ivtv_log_status() local
1562 alpha_mode[(data[0] >> 1) & 0x3], in ivtv_log_status()