| /linux-5.19.10/drivers/crypto/qat/qat_common/ |
| D | adf_admin.c | 154 const unsigned long ae_mask) in adf_send_admin() argument
158 for_each_set_bit(ae, &ae_mask, ICP_QAT_HW_AE_DELIMITER) in adf_send_admin()
171 u32 ae_mask = hw_device->ae_mask; in adf_init_ae() local
177 return adf_send_admin(accel_dev, &req, &resp, ae_mask); in adf_init_ae()
185 u32 ae_mask = hw_device->admin_ae_mask ?: hw_device->ae_mask; in adf_set_fw_constants() local
194 return adf_send_admin(accel_dev, &req, &resp, ae_mask); in adf_set_fw_constants()
203 unsigned long ae_mask; in adf_get_dc_capabilities() local
208 ae_mask = hw_device->ae_mask & ~hw_device->admin_ae_mask; in adf_get_dc_capabilities()
215 for_each_set_bit(ae, &ae_mask, GET_MAX_ACCELENGINES(accel_dev)) { in adf_get_dc_capabilities()
277 u32 ae_mask = hw_data->admin_ae_mask; in adf_init_admin_pm() local
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| D | qat_hal.c | 380 unsigned long ae_mask = handle->hal_handle->ae_mask; in qat_hal_check_ae_alive() local
385 for_each_set_bit(ae, &ae_mask, handle->hal_handle->ae_max_num) { in qat_hal_check_ae_alive()
419 unsigned long ae_mask = handle->hal_handle->ae_mask; in qat_hal_reset_timestamp() local
430 for_each_set_bit(ae, &ae_mask, handle->hal_handle->ae_max_num) { in qat_hal_reset_timestamp()
478 unsigned long ae_mask = handle->hal_handle->ae_mask; in qat_hal_clr_reset() local
501 for_each_set_bit(ae, &ae_mask, handle->hal_handle->ae_max_num) { in qat_hal_clr_reset()
607 unsigned long ae_mask = handle->hal_handle->ae_mask; in qat_hal_clear_xfer() local
611 for_each_set_bit(ae, &ae_mask, handle->hal_handle->ae_max_num) { in qat_hal_clear_xfer()
623 unsigned long ae_mask = handle->hal_handle->ae_mask; in qat_hal_clear_gpr() local
631 for_each_set_bit(ae, &ae_mask, handle->hal_handle->ae_max_num) { in qat_hal_clear_gpr()
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| D | qat_uclo.c | 375 unsigned long ae_mask = handle->hal_handle->ae_mask; in qat_uclo_init_ustore() local
389 for_each_set_bit(ae, &ae_mask, handle->hal_handle->ae_max_num) { in qat_uclo_init_ustore()
416 unsigned long ae_mask = handle->hal_handle->ae_mask; in qat_uclo_init_memory() local
430 for_each_set_bit(ae, &ae_mask, handle->hal_handle->ae_max_num) { in qat_uclo_init_memory()
661 unsigned long ae_mask = handle->hal_handle->ae_mask; in qat_uclo_map_ae() local
664 for_each_set_bit(ae, &ae_mask, max_ae) { in qat_uclo_map_ae()
863 unsigned long ae_mask = handle->hal_handle->ae_mask; in qat_uclo_init_globals() local
876 for_each_set_bit(ae, &ae_mask, handle->hal_handle->ae_max_num) { in qat_uclo_init_globals()
947 unsigned long ae_mask = handle->hal_handle->ae_mask; in qat_uclo_set_ae_mode() local
952 for_each_set_bit(ae, &ae_mask, handle->hal_handle->ae_max_num) { in qat_uclo_set_ae_mode()
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| D | adf_accel_engine.c | 18 u32 ae_mask; in adf_ae_fw_load_images() local
26 ae_mask = hw_device->uof_get_ae_mask(accel_dev, i); in adf_ae_fw_load_images()
27 if (!obj_name || !ae_mask) { in adf_ae_fw_load_images()
32 if (qat_uclo_set_cfg_ae_mask(loader, ae_mask)) { in adf_ae_fw_load_images()
151 if (hw_data->ae_mask & (1 << ae)) { in adf_ae_stop()
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| D | adf_hw_arbiter.c | 22 unsigned long ae_mask = hw_data->ae_mask; in adf_init_arb() local
41 for_each_set_bit(i, &ae_mask, hw_data->num_engines) in adf_init_arb()
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| D | adf_gen2_hw_data.c | 19 if (!self || !self->ae_mask) in adf_gen2_get_num_aes()
22 return hweight32(self->ae_mask); in adf_gen2_get_num_aes()
31 unsigned long ae_mask = hw_data->ae_mask; in adf_gen2_enable_error_correction() local
35 for_each_set_bit(i, &ae_mask, hw_data->num_engines) { in adf_gen2_enable_error_correction()
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| D | icp_qat_uclo.h | 411 unsigned int ae_mask; member
437 unsigned int ae_mask; member
482 unsigned int ae_mask; member
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| D | icp_qat_fw_loader_handle.h | 17 unsigned int ae_mask; member
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| D | adf_accel_devices.h | 213 u32 ae_mask; member
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| /linux-5.19.10/drivers/crypto/qat/qat_4xxx/ |
| D | adf_4xxx_hw_data.c | 14 u32 ae_mask; member
95 if (!self || !self->ae_mask) in get_num_aes()
98 return hweight32(self->ae_mask); in get_num_aes()
304 return adf_4xxx_fw_cy_config[obj_num].ae_mask; in uof_get_ae_mask()
306 return adf_4xxx_fw_dc_config[obj_num].ae_mask; in uof_get_ae_mask()
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| D | adf_drv.c | 219 hw_data->ae_mask = hw_data->get_ae_mask(hw_data); in adf_probe()
222 if (!hw_data->accel_mask || !hw_data->ae_mask || in adf_probe()
223 (~hw_data->ae_mask & 0x01)) { in adf_probe()
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| /linux-5.19.10/drivers/crypto/qat/qat_dh895xcc/ |
| D | adf_drv.c | 133 hw_data->ae_mask = hw_data->get_ae_mask(hw_data); in adf_probe()
136 if (!hw_data->accel_mask || !hw_data->ae_mask || in adf_probe()
137 ((~hw_data->ae_mask) & 0x01)) { in adf_probe()
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| /linux-5.19.10/drivers/crypto/qat/qat_c3xxx/ |
| D | adf_drv.c | 135 hw_data->ae_mask = hw_data->get_ae_mask(hw_data); in adf_probe()
138 if (!hw_data->accel_mask || !hw_data->ae_mask || in adf_probe()
139 ((~hw_data->ae_mask) & 0x01)) { in adf_probe()
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| /linux-5.19.10/drivers/crypto/qat/qat_c62x/ |
| D | adf_drv.c | 135 hw_data->ae_mask = hw_data->get_ae_mask(hw_data); in adf_probe()
138 if (!hw_data->accel_mask || !hw_data->ae_mask || in adf_probe()
139 ((~hw_data->ae_mask) & 0x01)) { in adf_probe()
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| /linux-5.19.10/drivers/crypto/qat/qat_dh895xccvf/ |
| D | adf_drv.c | 123 hw_data->ae_mask = hw_data->get_ae_mask(hw_data); in adf_probe()
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| /linux-5.19.10/drivers/crypto/qat/qat_c3xxxvf/ |
| D | adf_drv.c | 123 hw_data->ae_mask = hw_data->get_ae_mask(hw_data); in adf_probe()
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| /linux-5.19.10/drivers/crypto/qat/qat_c62xvf/ |
| D | adf_drv.c | 123 hw_data->ae_mask = hw_data->get_ae_mask(hw_data); in adf_probe()
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| /linux-5.19.10/drivers/scsi/aic94xx/ |
| D | aic94xx_sds.c | 391 __le32 ae_mask; member
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