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Searched refs:_en_mask (Results 1 – 16 of 16) sorted by relevance

/linux-5.19.10/drivers/clk/mediatek/
Dclk-mt7986-apmixed.c25 #define PLL_xtal(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
30 .en_mask = _en_mask, .flags = _flags, \
38 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, _pd_reg, \ argument
40 PLL_xtal(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \
Dclk-mt8186-apmixedsys.c17 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
25 .en_mask = _en_mask, \
Dclk-mt8195-apmixedsys.c31 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
40 .en_mask = _en_mask, \
Dclk-mt7629.c25 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
32 .en_mask = _en_mask, \
46 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
49 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \
Dclk-mt6797.c612 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
619 .en_mask = _en_mask, \
632 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
635 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \
Dclk-mt7622.c25 #define PLL_xtal(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits,\ argument
32 .en_mask = _en_mask, \
46 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
49 PLL_xtal(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits,\
Dclk-mt8516.c737 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
744 .en_mask = _en_mask, \
757 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
760 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \
Dclk-mt6779.c1146 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
1155 .en_mask = _en_mask, \
1173 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
1178 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \
Dclk-mt8167.c983 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
990 .en_mask = _en_mask, \
1003 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
1006 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \
Dclk-mt2712.c1167 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
1175 .en_mask = _en_mask, \
1190 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
1193 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \
Dclk-mt6765.c717 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
724 .en_mask = _en_mask, \
741 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
745 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \
Dclk-mt8173.c939 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
946 .en_mask = _en_mask, \
959 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
962 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \
Dclk-mt8183.c1068 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
1077 .en_mask = _en_mask, \
1095 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
1100 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \
Dclk-mt8192.c1121 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
1130 .en_mask = _en_mask, \
1149 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
1153 PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \
Dclk-mt8135.c597 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, _pd_reg, _pd_shift, _tuner_reg,… argument
602 .en_mask = _en_mask, \
Dclk-mt2701.c921 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, _pd_reg, \ argument
927 .en_mask = _en_mask, \