Searched refs:XUSB_PADCTL_IOPHY_PLL_S0_CTL2_XDIGCLK_SEL_MASK (Results 1 – 1 of 1) sorted by relevance
191 #define XUSB_PADCTL_IOPHY_PLL_S0_CTL2_XDIGCLK_SEL_MASK 0x7 macro1573 value &= ~((XUSB_PADCTL_IOPHY_PLL_S0_CTL2_XDIGCLK_SEL_MASK << in tegra124_usb3_port_enable()