XCHAL_HAVE_TLBS (reference) in projects: linux-5.19.10

Searched refs:XCHAL_HAVE_TLBS (Results 1 – 10 of 10) sorted by relevance

/linux-5.19.10/arch/xtensa/include/asm/ !
D	mmu_context.h	`30 #if (XCHAL_HAVE_TLBS != 1)`
D	initialize_mmu.h	`181 #if !defined(CONFIG_MMU) && (XCHAL_HAVE_TLBS \|\| XCHAL_HAVE_MPU)`
/linux-5.19.10/arch/xtensa/variants/fsf/include/variant/ !
D	core.h	`338 #define XCHAL_HAVE_TLBS 1 /* inverse of HAVE_CACHEATTR */ macro`
/linux-5.19.10/arch/xtensa/variants/test_mmuhifi_c3/include/variant/ !
D	core.h	`363 #define XCHAL_HAVE_TLBS 1 /* inverse of HAVE_CACHEATTR */ macro`
/linux-5.19.10/arch/xtensa/variants/dc232b/include/variant/ !
D	core.h	`403 #define XCHAL_HAVE_TLBS 1 /* inverse of HAVE_CACHEATTR */ macro`
/linux-5.19.10/arch/xtensa/variants/dc233c/include/variant/ !
D	core.h	`453 #define XCHAL_HAVE_TLBS 1 /* inverse of HAVE_CACHEATTR */ macro`
/linux-5.19.10/arch/xtensa/variants/test_kc705_hifi/include/variant/ !
D	core.h	`510 #define XCHAL_HAVE_TLBS 1 /* inverse of HAVE_CACHEATTR */ macro`
/linux-5.19.10/arch/xtensa/variants/csp/include/variant/ !
D	core.h	`553 #define XCHAL_HAVE_TLBS 1 /* inverse of HAVE_CACHEATTR */ macro`
/linux-5.19.10/arch/xtensa/variants/de212/include/variant/ !
D	core.h	`574 #define XCHAL_HAVE_TLBS 1 /* inverse of HAVE_CACHEATTR */ macro`
/linux-5.19.10/arch/xtensa/variants/test_kc705_be/include/variant/ !
D	core.h	`553 #define XCHAL_HAVE_TLBS 1 /* inverse of HAVE_CACHEATTR */ macro`