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Searched refs:VGT_TESS_DISTRIBUTION__ACCUM_QUAD_MASK (Results 1 – 9 of 9) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_8_0_sh_mask.h17939 #define VGT_TESS_DISTRIBUTION__ACCUM_QUAD_MASK 0xff0000 macro
Dgfx_8_1_sh_mask.h18529 #define VGT_TESS_DISTRIBUTION__ACCUM_QUAD_MASK 0xff0000 macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h17561 #define VGT_TESS_DISTRIBUTION__ACCUM_QUAD_MASK … macro
Dgc_9_1_sh_mask.h18872 #define VGT_TESS_DISTRIBUTION__ACCUM_QUAD_MASK … macro
Dgc_9_2_1_sh_mask.h18763 #define VGT_TESS_DISTRIBUTION__ACCUM_QUAD_MASK … macro
Dgc_9_4_2_sh_mask.h11008 #define VGT_TESS_DISTRIBUTION__ACCUM_QUAD_MASK … macro
Dgc_11_0_0_sh_mask.h22591 #define VGT_TESS_DISTRIBUTION__ACCUM_QUAD_MASK … macro
Dgc_10_1_0_sh_mask.h24979 #define VGT_TESS_DISTRIBUTION__ACCUM_QUAD_MASK … macro
Dgc_10_3_0_sh_mask.h23245 #define VGT_TESS_DISTRIBUTION__ACCUM_QUAD_MASK … macro