Searched refs:VF610_CLK_SAI0_DIV (Results 1 – 3 of 3) sorted by relevance
108 #define VF610_CLK_SAI0_DIV 99 macro
389 clk[VF610_CLK_SAI0_DIV] = imx_clk_divider("sai0_div", "sai0_en", CCM_CSCDR1, 0, 4); in vf610_clocks_init()
191 <&clks VF610_CLK_SAI0_DIV>,