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Searched refs:VCO_REF_CLK_RATE (Results 1 – 5 of 5) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/msm/dsi/phy/
Ddsi_phy_28nm.c34 #define VCO_REF_CLK_RATE 19200000 macro
147 rem = rate % VCO_REF_CLK_RATE; in dsi_pll_28nm_clk_set_rate()
151 div_fbx1000 = rate / (VCO_REF_CLK_RATE / 500); in dsi_pll_28nm_clk_set_rate()
152 gen_vco_clk = div_fbx1000 * (VCO_REF_CLK_RATE / 500); in dsi_pll_28nm_clk_set_rate()
156 div_fbx1000 = rate / (VCO_REF_CLK_RATE / 1000); in dsi_pll_28nm_clk_set_rate()
157 gen_vco_clk = div_fbx1000 * (VCO_REF_CLK_RATE / 1000); in dsi_pll_28nm_clk_set_rate()
246 u32 ref_clk = VCO_REF_CLK_RATE; in dsi_pll_28nm_clk_recalc_rate()
254 ref_clk += (doubler * VCO_REF_CLK_RATE); in dsi_pll_28nm_clk_recalc_rate()
Ddsi_phy_14nm.c37 #define VCO_REF_CLK_RATE 19200000 macro
172 DBG("vco=%lld ref=%d", pconf->vco_current_rate, VCO_REF_CLK_RATE); in pll_14nm_ssc_calc()
175 period = (u32)VCO_REF_CLK_RATE / 1000; in pll_14nm_ssc_calc()
184 ref = VCO_REF_CLK_RATE; in pll_14nm_ssc_calc()
211 u64 fref = VCO_REF_CLK_RATE; in pll_14nm_dec_frac_calc()
254 u64 fref = VCO_REF_CLK_RATE; in pll_14nm_calc_vco_count()
Ddsi_phy_10nm.c39 #define VCO_REF_CLK_RATE 19200000 macro
116 u64 fref = VCO_REF_CLK_RATE; in dsi_pll_calc_dec_frac()
161 ssc_per = DIV_ROUND_CLOSEST(VCO_REF_CLK_RATE, config->ssc_freq) / 2 - 1; in dsi_pll_calc_ssc()
422 u64 ref_clk = VCO_REF_CLK_RATE; in dsi_pll_10nm_vco_recalc_rate()
527 VCO_REF_CLK_RATE); in dsi_10nm_pll_restore_state()
Ddsi_phy_7nm.c39 #define VCO_REF_CLK_RATE 19200000 macro
104 u64 fref = VCO_REF_CLK_RATE; in dsi_pll_calc_dec_frac()
149 ssc_per = DIV_ROUND_CLOSEST(VCO_REF_CLK_RATE, config->ssc_freq) / 2 - 1; in dsi_pll_calc_ssc()
436 u64 ref_clk = VCO_REF_CLK_RATE; in dsi_pll_7nm_vco_recalc_rate()
541 VCO_REF_CLK_RATE); in dsi_7nm_pll_restore_state()
Ddsi_phy_28nm_8960.c42 #define VCO_REF_CLK_RATE 27000000 macro
103 val = VCO_REF_CLK_RATE / 10; in dsi_pll_28nm_clk_set_rate()