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Searched refs:V3D_READ (Results 1 – 11 of 11) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/v3d/
Dv3d_mmu.c40 ret = wait_for(!(V3D_READ(V3D_MMU_CTL) & in v3d_mmu_flush_all()
45 V3D_WRITE(V3D_MMU_CTL, V3D_READ(V3D_MMU_CTL) | in v3d_mmu_flush_all()
52 ret = wait_for(!(V3D_READ(V3D_MMU_CTL) & in v3d_mmu_flush_all()
59 ret = wait_for(!(V3D_READ(V3D_MMUC_CONTROL) & in v3d_mmu_flush_all()
Dv3d_debugfs.c91 V3D_READ(v3d_hub_reg_defs[i].reg)); in v3d_v3d_debugfs_regs()
140 ident0 = V3D_READ(V3D_HUB_IDENT0); in v3d_v3d_debugfs_ident()
141 ident1 = V3D_READ(V3D_HUB_IDENT1); in v3d_v3d_debugfs_ident()
142 ident2 = V3D_READ(V3D_HUB_IDENT2); in v3d_v3d_debugfs_ident()
143 ident3 = V3D_READ(V3D_HUB_IDENT3); in v3d_v3d_debugfs_ident()
Dv3d_irq.c149 intsts = V3D_READ(V3D_HUB_INT_STS); in v3d_hub_irq()
166 u32 axi_id = V3D_READ(V3D_MMU_VIO_ID); in v3d_hub_irq()
167 u64 vio_addr = ((u64)V3D_READ(V3D_MMU_VIO_ADDR) << in v3d_hub_irq()
181 V3D_WRITE(V3D_MMU_CTL, V3D_READ(V3D_MMU_CTL)); in v3d_hub_irq()
Dv3d_drv.c79 args->value = V3D_READ(offset); in v3d_get_param_ioctl()
240 mmu_debug = V3D_READ(V3D_MMU_DEBUG_INFO); in v3d_platform_drm_probe()
248 ident1 = V3D_READ(V3D_HUB_IDENT1); in v3d_platform_drm_probe()
Dv3d_drv.h203 #define V3D_READ(offset) readl(v3d->hub_regs + offset) macro
/linux-5.19.10/drivers/gpu/drm/vc4/
Dvc4_gem.c232 state->ct0ca = V3D_READ(V3D_CTNCA(0)); in vc4_save_hang_state()
233 state->ct0ea = V3D_READ(V3D_CTNEA(0)); in vc4_save_hang_state()
235 state->ct1ca = V3D_READ(V3D_CTNCA(1)); in vc4_save_hang_state()
236 state->ct1ea = V3D_READ(V3D_CTNEA(1)); in vc4_save_hang_state()
238 state->ct0cs = V3D_READ(V3D_CTNCS(0)); in vc4_save_hang_state()
239 state->ct1cs = V3D_READ(V3D_CTNCS(1)); in vc4_save_hang_state()
241 state->ct0ra0 = V3D_READ(V3D_CT00RA0); in vc4_save_hang_state()
242 state->ct1ra0 = V3D_READ(V3D_CT01RA0); in vc4_save_hang_state()
244 state->bpca = V3D_READ(V3D_BPCA); in vc4_save_hang_state()
245 state->bpcs = V3D_READ(V3D_BPCS); in vc4_save_hang_state()
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Dvc4_drv.c113 args->value = V3D_READ(V3D_IDENT0); in vc4_get_param_ioctl()
120 args->value = V3D_READ(V3D_IDENT1); in vc4_get_param_ioctl()
127 args->value = V3D_READ(V3D_IDENT2); in vc4_get_param_ioctl()
Dvc4_v3d.c105 uint32_t ident1 = V3D_READ(V3D_IDENT1); in vc4_v3d_debugfs_ident()
446 if (V3D_READ(V3D_IDENT0) != V3D_EXPECTED_IDENT0) { in vc4_v3d_bind()
448 V3D_READ(V3D_IDENT0), V3D_EXPECTED_IDENT0); in vc4_v3d_bind()
Dvc4_perfmon.c81 perfmon->counters[i] += V3D_READ(V3D_PCTR(i)); in vc4_perfmon_stop()
Dvc4_irq.c213 intctl = V3D_READ(V3D_INTCTL); in vc4_irq()
Dvc4_drv.h577 #define V3D_READ(offset) readl(vc4->v3d->regs + offset) macro