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Searched refs:UMC_BASE__INST2_SEG1 (Results 1 – 13 of 13) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/
Dnavi10_ip_offset.h786 #define UMC_BASE__INST2_SEG1 0 macro
Ddimgrey_cavefish_ip_offset.h966 #define UMC_BASE__INST2_SEG1 0x02426000 macro
Dnavi12_ip_offset.h1006 #define UMC_BASE__INST2_SEG1 0x02426000 macro
Dnavi14_ip_offset.h1006 #define UMC_BASE__INST2_SEG1 0x02426000 macro
Dvega20_ip_offset.h855 #define UMC_BASE__INST2_SEG1 0 macro
Dsienna_cichlid_ip_offset.h1055 #define UMC_BASE__INST2_SEG1 0x02426000 macro
Dbeige_goby_ip_offset.h1191 #define UMC_BASE__INST2_SEG1 0 macro
Drenoir_ip_offset.h1256 #define UMC_BASE__INST2_SEG1 0 macro
Dvega10_ip_offset.h1098 #define UMC_BASE__INST2_SEG1 0 macro
Dvangogh_ip_offset.h1363 #define UMC_BASE__INST2_SEG1 0x02426000 macro
Dyellow_carp_offset.h1283 #define UMC_BASE__INST2_SEG1 0 macro
Darct_ip_offset.h1440 #define UMC_BASE__INST2_SEG1 0x00094000 macro
Daldebaran_ip_offset.h1410 #define UMC_BASE__INST2_SEG1 0x00154000 macro