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Searched refs:UASM_i_LW (Results 1 – 3 of 3) sorted by relevance

/linux-5.19.10/arch/mips/kvm/
Dentry.c167 UASM_i_LW(p, tmp, offsetof(struct pt_regs, cp0_epc), frame); in kvm_mips_build_restore_scratch()
171 UASM_i_LW(p, tmp, offsetof(struct pt_regs, cp0_cause), frame); in kvm_mips_build_restore_scratch()
257 UASM_i_LW(&p, K0, offsetof(struct kvm_vcpu_arch, guest_ebase), K1); in kvm_mips_build_vcpu_run()
299 UASM_i_LW(&p, T0, offsetof(struct kvm_vcpu_arch, pc), K1); in kvm_mips_build_enter_guest()
317 UASM_i_LW(&p, S0, (int)offsetof(struct kvm_vcpu, kvm) - in kvm_mips_build_enter_guest()
319 UASM_i_LW(&p, A0, offsetof(struct kvm, arch.gpa_mm.pgd), S0); in kvm_mips_build_enter_guest()
370 UASM_i_LW(&p, K0, 0, T3); in kvm_mips_build_enter_guest()
381 UASM_i_LW(&p, T2, uasm_rel_lo((long)&cpu_data[0].asid_mask), AT); in kvm_mips_build_enter_guest()
400 UASM_i_LW(&p, i, offsetof(struct kvm_vcpu_arch, gprs[i]), K1); in kvm_mips_build_enter_guest()
405 UASM_i_LW(&p, K0, offsetof(struct kvm_vcpu_arch, hi), K1); in kvm_mips_build_enter_guest()
[all …]
/linux-5.19.10/arch/mips/mm/
Dtlbex.c396 UASM_i_LW(p, 1, offsetof(struct tlb_reg_save, a), K0); in build_restore_work_registers()
397 UASM_i_LW(p, 2, offsetof(struct tlb_reg_save, b), K0); in build_restore_work_registers()
677 UASM_i_LW(p, 1, scratchpad_offset(0), 0); in build_restore_pagemask()
719 UASM_i_LW(p, tmp, 0, pmd); in build_is_huge_pte()
768 UASM_i_LW(p, pte, 0, ptr); /* Needed because SC killed our PTE */ in build_huge_handler_tail()
951 UASM_i_LW(p, 1, scratchpad_offset(0), 0); in build_get_pgd_vmalloc64()
1030 UASM_i_LW(p, ptr, 0, ptr); in build_get_ptep()
1036 UASM_i_LW(p, ptr, 0, ptr); in build_get_ptep()
1079 UASM_i_LW(p, tmp, pte_off_even, ptep); /* get even pte */ in build_update_entries()
1080 UASM_i_LW(p, ptep, pte_off_odd, ptep); /* get odd pte */ in build_update_entries()
[all …]
/linux-5.19.10/arch/mips/include/asm/
Duasm.h215 # define UASM_i_LW(buf, rs, rt, off) uasm_i_ld(buf, rs, rt, off) macro
231 # define UASM_i_LW(buf, rs, rt, off) uasm_i_lw(buf, rs, rt, off) macro