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Searched refs:TTBR1_EL1 (Results 1 – 6 of 6) sorted by relevance

/linux-5.19.10/arch/arm64/kvm/hyp/include/hyp/
Dsysreg-sr.h46 ctxt_sys_reg(ctxt, TTBR1_EL1) = read_sysreg_el1(SYS_TTBR1); in __sysreg_save_el1_state()
118 write_sysreg_el1(ctxt_sys_reg(ctxt, TTBR1_EL1), SYS_TTBR1); in __sysreg_restore_el1_state()
/linux-5.19.10/arch/arm64/include/asm/
Dkvm_host.h187 TTBR1_EL1, /* Translation Table Base Register 1 */ enumerator
530 case TTBR1_EL1: *val = read_sysreg_s(SYS_TTBR1_EL12); break; in __vcpu_read_sys_reg_from_cpu()
575 case TTBR1_EL1: write_sysreg_s(val, SYS_TTBR1_EL12); break; in __vcpu_write_sys_reg_to_cpu()
/linux-5.19.10/arch/arm64/tools/
Dsysreg367 Sysreg TTBR1_EL1 3 0 2 0 1
/linux-5.19.10/Documentation/admin-guide/kdump/
Dvmcoreinfo.rst489 Indicates the size offset of the memory region addressed by TTBR1_EL1.
492 TTBR1_EL1 is the table base address register specified by ARMv8-A
/linux-5.19.10/arch/arm64/kvm/
Dsys_regs.c1605 { SYS_DESC(SYS_TTBR1_EL1), access_vm_reg, reset_unknown, TTBR1_EL1 },
2054 { Op1( 0), CRn( 2), CRm( 0), Op2( 1), access_vm_reg, NULL, TTBR1_EL1 },
2194 { Op1( 1), CRn( 0), CRm( 2), Op2( 0), access_vm_reg, NULL, TTBR1_EL1 },
/linux-5.19.10/arch/arm64/
DKconfig1024 case-3 TTBR1_EL1 with TCR_EL1.NFD1 == 1.
1048 in TTBR1_EL1, this situation only occurs in the entry trampoline and