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Searched refs:TRCVMIDCVRn (Results 1 – 3 of 3) sorted by relevance

/linux-5.19.10/drivers/hwtracing/coresight/
Dcoresight-etm4x.h98 #define TRCVMIDCVRn(n) (0x640 + (n * 8)) macro
449 CASE_##op((val), TRCVMIDCVRn(0)) \
450 CASE_##op((val), TRCVMIDCVRn(1)) \
451 CASE_##op((val), TRCVMIDCVRn(2)) \
452 CASE_##op((val), TRCVMIDCVRn(3)) \
453 CASE_##op((val), TRCVMIDCVRn(4)) \
454 CASE_##op((val), TRCVMIDCVRn(5)) \
455 CASE_##op((val), TRCVMIDCVRn(6)) \
456 CASE_##op((val), TRCVMIDCVRn(7)) \
Dcoresight-etm4x-cfg.c92 } else if ((offset >= TRCCIDCVRn(0)) && (offset <= TRCVMIDCVRn(7))) { in etm4_cfg_map_reg_offset()
98 CHECKREGIDX(TRCVMIDCVRn(0), vmid_val, idx, off_mask); in etm4_cfg_map_reg_offset()
Dcoresight-etm4x-core.c463 etm4x_relaxed_write64(csa, config->vmid_val[i], TRCVMIDCVRn(i)); in etm4_enable_hw()
1656 state->trcvmidcvr[i] = etm4x_read64(csa, TRCVMIDCVRn(i)); in __etm4_cpu_save()
1778 etm4x_relaxed_write64(csa, state->trcvmidcvr[i], TRCVMIDCVRn(i)); in __etm4_cpu_restore()